MC68HC11E1CFN2 Freescale Semiconductor, MC68HC11E1CFN2 Datasheet - Page 70

• Manufacturer Part Number: MC68HC11E1CFN2
• Description: IC MCU 512 EEPROM 2MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11E1CFN2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -

Analog-to-Digital (A/D) Converter
Data Sheet
70
NOTE:
When the multiple-channel continuous scan mode is used, extra care is needed in
the design of circuitry driving the A/D inputs. The charge on the capacitive DAC
array before the sample time is related to the voltage on the previously converted
channel. A charge share situation exists between the internal DAC capacitance
and the external circuit capacitance. Although the amount of charge involved is
small, the rate at which it is repeated is every 64 µs for an E clock of 2 MHz. The
RC charging rate of the external circuit must be balanced against this charge
sharing effect to avoid errors in accuracy. Refer to M68HC11 Reference Manual,
Motorola document order number M68HC11RM/AD, for further information.
CD:CA — Channel Selects D:A Bits
system is configured to perform a conversion on each of four channels where
each result register corresponds to one channel.
Refer to
two least significant channel select bits (CB and CA) have no meaning and the
CD and CC bits specify which group of four channels is to be converted.
Freescale Semiconductor, Inc.
For More Information On This Product,
Table
Channel Select
1. Used for factory testing
CD:CC:CB:CA
Analog-to-Digital (A/D) Converter
Control Bits
Go to: www.freescale.com
Table 3-2. A/D Converter Channel Selection
3-2. When a multiple channel mode is selected (MULT = 1), the
10XX
0000
0001
0010
0011
0100
0101
0110
0111
1100
1101
1110
1111
Channel Signal
Reserved
Reserved
(V
V
V
RH
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
RH
RL
)/2
(1)
(1)
(1)
(1)
Result in ADRx
if MULT = 1
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
—
M68HC11E Family — Rev. 5
MOTOROLA