MC68HC11E1CFN2 Freescale Semiconductor, MC68HC11E1CFN2 Datasheet - Page 82

• Manufacturer Part Number: MC68HC11E1CFN2
• Description: IC MCU 512 EEPROM 2MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11E1CFN2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -

Central Processor Unit (CPU)
Data Sheet
82
BRCLR(opr)
BRSET(opr)
BSET (opr)
Mnemonic
BITA (opr)
BITB (opr)
CLR (opr)
BEQ (rel)
BGE (rel)
BRN (rel)
BGT (rel)
BHS (rel)
BLO (rel)
BNE (rel)
BRA (rel)
BSR (rel)
BVC (rel)
BVS (rel)
BLE (rel)
BLS (rel)
BLT (rel)
BMI (rel)
BPL (rel)
BHI (rel)
CLRA
CLRB
CBA
CLC
CLV
CLI
(msk)
(rel)
(msk)
(rel)
(msk)
Branch if = Zero
Branch if ∆ Zero
Branch if > Zero
Higher or Same
Branch if ∆ Zero
Branch if Lower
Branch if Lower
Branch if < Zero
Compare A to B
Branch if Minus
Branch Always
Overflow Clear
Clear Overflow
Branch if not =
Branch if Bit(s)
Clear Carry Bit
Clear Interrupt
Accumulator A
Accumulator B
Clear Memory
Branch if Plus
Branch Never
Overflow Set
with Memory
with Memory
Bit(s) Test A
Bit(s) Test B
Subroutine
Operation
Bit(s) Clear
Branch to
Set Bit(s)
Branch if
Branch if
Branch if
Branch if
Branch if
or Same
Higher
Mask
Clear
Clear
Zero
Byte
Flag
Set
? Z + (N ⊕ V) = 0
? Z + (N ⊕ V) = 1
See Figure 3–2
? (M) • mm = 0
M + mm ⇒ M
? M • mm = 0
Description
? N ⊕ V = 0
? N ⊕ V = 1
? C + Z = 0
? C + Z = 1
? C = 0
? C = 1
? N = 1
? N = 0
? V = 0
? V = 1
? Z = 1
? Z = 0
? 1 = 1
? 1 = 0
0 ⇒ C
0 ⇒ M
0 ⇒ A
0 ⇒ B
0 ⇒ V
A – B
A • M
B • M
0 ⇒ I
Table 4-2. Instruction Set (Sheet 2 of 7)
Freescale Semiconductor, Inc.
For More Information On This Product,
A
A
A
A
A
B
B
B
B
B
A
B
Addressing
Go to: www.freescale.com
Central Processor Unit (CPU)
Mode
REL
REL
REL
REL
REL
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
REL
REL
REL
REL
REL
REL
REL
REL
DIR
IND,X
IND,Y
REL
DIR
IND,X
IND,Y
DIR
IND,X
IND,Y
REL
REL
REL
INH
INH
INH
EXT
IND,X
IND,Y
INH
INH
INH
18
18
18
18
18
18
Opcode
27
2C
2E
22
24
85
95
A5
A5
C5
D5
E5
E5
2F
25
23
2D
2B
26
2A
20
13
1F
1F
21
12
1E
1E
14
1C
1C
8D
28
29
11
0C
0E
7F
6F
6F
4F
5F
0A
B5
F5
Instruction
rr
rr
rr
rr
rr
ii
dd
hh
ff
ff
ii
dd
hh
ff
ff
rr
rr
rr
rr
rr
rr
rr
rr
dd
rr
ff
rr
ff
rr
rr
dd
rr
ff
rr
ff
rr
dd
ff
ff
rr
rr
rr
hh
ff
ff
Operand
—
—
—
—
—
—
ll
ll
mm
mm
mm
mm
mm
mm
mm
mm
mm
ll
Cycles
3
3
3
3
3
2
3
4
4
5
2
3
4
4
5
3
3
3
3
3
3
3
3
6
7
8
3
6
7
8
6
7
8
6
3
3
2
2
2
6
6
7
2
2
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
S
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
X
M68HC11E Family — Rev. 5
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—
—
—
—
—
—
—
—
—
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—
—
—
—
—
—
—
—
—
H
Condition Codes
—
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—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
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—
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—
0
I
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
N
∆
∆
∆
∆
0
0
0
MOTOROLA
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Z
∆
∆
∆
∆
1
1
1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
0
0
0
∆
0
0
0
0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
C
∆
0
0
0
0