MC68HC711K4CFU4 Freescale Semiconductor, MC68HC711K4CFU4 Datasheet - Page 153

• Manufacturer Part Number: MC68HC711K4CFU4
• Description: IC MCU 24K 4MHZ EEPROM 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711K4CFU4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

7.5 Receive Operation
M68HC11K Family
MOTOROLA
During receive operations, data from the TxD pin is shifted into the serial
shift register. A completed word is parallel-loaded to a receive data
register (RDR), which can be read through SCDRH/L. This
double-buffered operation allows reception of the current character while
the MCU reads the previous character.
The SCI receiver has seven status flags, summarized in
Three of the flags can generate interrupt requests if the corresponding
enable bits in SCCR2 are set. The status flags are set by the SCI logic
in response to specific conditions in the receiver. These flags can be
read (polled) at any time by software. Each bit except RAF is cleared by
reading SCSR1 and SCDR sequentially.
RDRF
IDLE
Flag
RAF
OR
NF
FE
PF
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The receive data register full (RDRF) flag is set when the last bit
of a character is received and data is transferred from the shift
register to the RDR.
The IDLE flag is set after a transition on the RxD line from an
active state to an idle state. This prevents repeated interrupts
during the time RxD remains idle.
Serial Communications Interface (SCI)
Receiver active A character is being received
Overrun error
Receive data
Frame error
Noise error
Parity error
register full
detected
Idle-line
Name
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Table 7-1. SCI Receiver Flags
Character transferred from shift register
Active transmit line goes idle
Character ready for RDR while previous
Samples of data bit not unanimous
0 detected where stop bit expected
Calculated parity does not match data
to RDR
character unread
parity bit
Set When
Serial Communications Interface (SCI)
Receive Operation
Table
Technical Data
Enable Bit
Interrupt
7-1.
ILIE
RIE
RIE
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