MC68HC908QT2CDW Freescale Semiconductor, MC68HC908QT2CDW Datasheet - Page 46

no-image

MC68HC908QT2CDW

Manufacturer Part Number
MC68HC908QT2CDW
Description
IC MCU 1.5K FLASH W/ADC 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908QT2CDW

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
5
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908QT2CDW
Manufacturer:
FREESCALE
Quantity:
3
Part Number:
MC68HC908QT2CDWE
Manufacturer:
FREESCALE
Quantity:
1 000
Part Number:
MC68HC908QT2CDWE
Manufacturer:
FREESCALE
Quantity:
1 000
Analog-to-Digital Converter (ADC)
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
CH[4:0] — ADC Channel Select Bits
46
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when ADR is read or ADSCR is written. Reset clears the AIEN bit.
When set, the ADC will convert samples continuously and update ADR at the end of each conversion.
Only one conversion is allowed when this bit is cleared. Reset clears the ADCO bit.
CH4, CH3, CH2, CH1, and CH0 form a 5-bit field which is used to select one of the four ADC channels.
The five select bits are detailed in
analog and a digital input simultaneously to prevent switching noise from corrupting the analog signal.
The ADC subsystem is turned off when the channel select bits are all set to 1. This feature allows for
reduced power consumption for the MCU when the ADC is not used. Reset sets all of these bits to 1.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
Recovery from the disabled state requires one conversion cycle to stabilize.
1. If any unused channels are selected, the resulting ADC conversion will be
2. The voltage levels supplied from internal reference nodes, as specified in the
CH4
0
0
0
0
0
1
1
1
1
1
1
unknown.
table, are used to verify the operation of the ADC converter both in produc-
tion test and for user applications.
CH3
0
0
0
0
0
1
1
1
1
1
1
MC68HC908QY/QT Family Data Sheet, Rev. 6
CH2
Table 3-1. MUX Channel Select
0
0
0
0
1
0
0
1
1
1
1
Table
CH1
3-1. Care should be taken when using a port pin as both an
0
0
1
1
0
1
1
0
0
1
1
NOTE
CH0
0
1
0
1
0
0
1
0
1
0
1
Channel
ADC0
ADC1
ADC2
ADC3
ADC
ADC power off
Input Select
Unused
Reserved
Unused
V
V
PTA0
PTA1
PTA4
PTA5
DDA
SSA
(2)
(2)
(1)
Freescale Semiconductor

Related parts for MC68HC908QT2CDW