MC68HC908QY1CP Freescale Semiconductor, MC68HC908QY1CP Datasheet - Page 67

• Manufacturer Part Number: MC68HC908QY1CP
• Description: IC MCU 1.5K FLASH 16-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908QY1CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

Freescale Semiconductor
BHS rel
BIH rel
BIL rel
BIT #opr
BIT opr
BIT opr
BIT opr,X
BIT opr,X
BIT ,X
BIT opr,SP
BIT opr,SP
BLE opr
BLO rel
BLS rel
BLT opr
BMC rel
BMI rel
BMS rel
BNE rel
BPL rel
BRA rel
BRCLR n,opr,rel Branch if Bit n in M Clear
BRN rel
BRSET n,opr,rel Branch if Bit n in M Set
BSET n,opr
BSR rel
CBEQ opr,rel
CBEQA #opr,rel
CBEQX #opr,rel
CBEQ opr,X+,rel
CBEQ X+,rel
CBEQ
opr,SP,rel
CLC
Source
Form
Branch if Higher or Same
(Same as BCC)
Branch if IRQ Pin High
Branch if IRQ Pin Low
Bit Test
Branch if Less Than or Equal To
(Signed Operands)
Branch if Lower (Same as BCS)
Branch if Lower or Same
Branch if Less Than (Signed Operands)
Branch if Interrupt Mask Clear
Branch if Minus
Branch if Interrupt Mask Set
Branch if Not Equal
Branch if Plus
Branch Always
Branch Never
Set Bit n in M
Branch to Subroutine
Compare and Branch if Equal
Clear Carry Bit
Operation
Table 7-1. Instruction Set Summary (Sheet 2 of 6)
MC68HC908QY/QT Family Data Sheet, Rev. 6
PC ← (PC) + 2 + rel ? (Z) | (N
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 2 + rel ? (A) – (M) = $00
PC ← (PC) + 4 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (X) – (M) = $00
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 2 + rel ? (C) | (Z) = 1
PC ← (PC) + 2 + rel ? (N
PC ← (PC) + 3 + rel ? (Mn) = 0
PC ← (PC) + 3 + rel ? (Mn) = 1
PC ← (PC) + 2 + rel ? IRQ = 1
PC ← (PC) + 2 + rel ? IRQ = 0
PC ← (PC) + 2 + rel ? (C) = 0
PC ← (PC) + 2 + rel ? (C) = 1
PC ← (PC) + 2 + rel ? (N) = 1
PC ← (PC) + 2 + rel ? (N) = 0
PC ← (PC) + 2 + rel ? (Z) = 0
PC ← (PC) + 2 + rel ? (I) = 0
PC ← (PC) + 2 + rel ? (I) = 1
PC ← (PC) + 2; push (PCL)
SP ← (SP) – 1; push (PCH)
PC ← (PC) + 2 + rel
PC ← (PC) + rel
PC ← (PC) + 2
SP ← (SP) – 1
Description
(A) & (M)
Mn ← 1
C ← 0
⊕
⊕
V) =1
V) = 1 – – – – – – REL
V H I N Z C
– – – – – – REL
– – – – – – REL
– – – – – – REL
0 – –
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – – – REL
– – – – –
– – – – – – REL
– – – – –
– – – – – –
– – – – – – REL
– – – – – –
– – – – – 0 INH
on CCR
Effect
Instruction Set Summary
–
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
DIR
IMM
IMM
IX1+
IX+
SP1
9EE5
9ED5
9E61
AD
C5
D5
2C
2D
0D
0C
1C
24
2F
2E
A5
B5
E5
F5
93
25
23
91
2B
26
2A
20
01
03
05
07
09
0B
0F
21
00
02
04
06
08
0A
0E
10
12
14
16
18
1A
1E
31
41
51
61
71
98
rr
rr
rr
ii
dd
hh ll
ee ff
ff
ff
ee ff
rr
rr
rr
rr
rr
rr
rr
rr
rr
rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd
dd
dd
dd
dd
dd
dd
dd
rr
dd rr
ii rr
ii rr
ff rr
rr
ff rr
67
3
3
3
2
3
4
4
3
2
4
5
3
3
3
3
3
3
3
3
3
3
5
5
5
5
5
5
5
5
3
5
5
5
5
5
5
5
5
4
4
4
4
4
4
4
4
4
5
4
4
5
4
6
1