MC68HC908QY2CDW Freescale Semiconductor, MC68HC908QY2CDW Datasheet - Page 115
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MC68HC908QY2CDW
Manufacturer Part Number
MC68HC908QY2CDW
Description
IC MCU 1.5K FLASH W/ADC 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QY4MDWER.pdf
(184 pages)
Specifications of MC68HC908QY2CDW
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Connectivity
-
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A module that is active during wait mode can wake up the CPU with an interrupt if the interrupt is enabled.
Stacking for the interrupt begins one cycle after the WAIT instruction during which the interrupt occurred.
In wait mode, the CPU clocks are inactive. Refer to the wait mode subsection of each module to see if the
module is active or inactive in wait mode. Some modules can be programmed to be active in wait mode.
Wait mode can also be exited by a reset (or break in emulation mode). A break interrupt during wait mode
sets the SIM break stop/wait bit, SBSW, in the break status register (BSR). If the COP disable bit, COPD,
in the configuration register is 0, then the computer operating properly module (COP) is enabled and
remains active in wait mode.
Figure 13-15
13.7.2 Stop Mode
In stop mode, the SIM counter is reset and the system clocks are disabled. An interrupt request from a
module can cause an exit from stop mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the oscillator signals (BUSCLKX2 and BUSCLKX4) in stop mode, stopping the CPU
and peripherals. Stop recovery time is selectable using the SSREC bit in the configuration register 1
(CONFIG1). If SSREC is set, stop recovery is reduced from the normal delay of 4096 BUSCLKX4 cycles
down to 32. This is ideal for the internal oscillator, RC oscillator, and external oscillator options which do
not require long start-up times from stop mode.
Freescale Semiconductor
and
EXITSTOPWAIT
NOTE: EXITSTOPWAIT = RST pin OR CPU interrupt OR break interrupt
ADDRESS BUS
ADDRESS BUS
External crystal applications should use the full stop recovery time by
clearing the SSREC bit.
BUSCLKX4
DATA BUS
DATA BUS
Figure 13-16
RST
Figure 13-16. Wait Recovery from Internal Reset
$A6
$A6
Figure 13-15. Wait Recovery from Interrupt
show the timing for wait recovery.
MC68HC908QY/QT Family Data Sheet, Rev. 6
$6E0B
$A6
$6E0B
$A6
$A6
$A6
CYCLES
$6E0C
32
NOTE
$01
$00FF
CYCLES
$0B
32
$00FE
$6E
RST VCT H
$00FD
RST VCT L
$00FC
Low-Power Modes
115
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