C8051F021 Silicon Laboratories Inc, C8051F021 Datasheet - Page 184

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C8051F021

Manufacturer Part Number
C8051F021
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F02xr
Datasheets

Specifications of C8051F021

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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C8051F020/1/2/3
Figure 18.2 shows a typical SMBus configuration. The SMBus0 interface will work at any voltage between 3.0 V and
5.0 V and different devices on the bus may operate at different voltage levels. The bi-directional SCL (serial clock)
and SDA (serial data) lines must be connected to a positive power supply voltage through a pull-up resistor or similar
circuit. Every device connected to the bus must have an open-drain or open-collector output for both the SCL and
SDA lines, so that both are pulled high when the bus is free. The maximum number of devices on the bus is limited
only by the requirement that the rise and fall times on the bus will not exceed 300 ns and 1000 ns, respectively.
18.1. Supporting Documents
It is assumed the reader is familiar with or has access to the following supporting documents:
184
1.
2.
3.
VDD = 5V
The I
The I
System Management Bus Specification -- Version 1.1, SBS Implementers Forum.
2
2
C-bus and how to use it (including specifications), Philips Semiconductor.
C-Bus Specification -- Version 2.0, Philips Semiconductor.
Figure 18.2. Typical SMBus Configuration
VDD = 3V
Master
Device
Rev. 1.4
VDD = 5V
Device 1
Slave
VDD = 3V
Device 2
Slave
SDA
SCL

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