C8051F023 Silicon Laboratories Inc, C8051F023 Datasheet - Page 246

• Manufacturer Part Number: C8051F023
• Description: IC 8051 MCU 64K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F02xr

Specifications of C8051F023

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

C8051F020/1/2/3
22.3.3. Mode 2: Baud Rate Generator
Timer 4 can be used as a baud rate generator for UART1 when UART1 is operated in modes 1 or 3 (refer to Section
“21.1. UART1 Operational
Rate Generator mode, Timer 4 works similarly to the auto-reload mode. On overflow, the 16-bit value held in the two
capture registers (RCAP4H, RCAP4L) is automatically loaded into the counter/timer register. However, the TF4
overflow flag is not set and no interrupt is generated. Instead, the overflow event is used as the input to the UART's
shift clock. Timer 4 overflows can be selected to generate baud rates for transmit and/or receive independently.
The Baud Rate Generator mode is selected by setting RCLK1 (T4CON.5) and/or TCLK1 (T4CON.4) to ‘1’. When
RCLK1 or TCLK1 is set to logic 1, Timer 4 operates in the auto-reload mode regardless of the state of the CP/RL4
bit. Note that in Baud Rate Generator mode, the Timer 4 timebase is the system clock divided by two. When selected
as the UART1 baud clock source, Timer 4 defines the UART1 baud rate as follows:
Baud Rate = SYSCLK / ((65536 - [RCAP4H, RCAP4L] ) * 32)
If a different time base is required, setting the C/T4 bit to logic 1 will allow the timebase to be derived from the exter-
nal input pin T4. In this case, the baud rate for the UART is calculated as:
Baud Rate = F
Where F
held in the capture registers.
As explained above, in Baud Rate Generator mode, Timer 4 does not set the TF4 overflow flag and therefore cannot
generate an interrupt. However, if EXEN4 is set to logic 1, a high-to-low transition on the T4EX input pin will set the
EXF4 flag and a Timer 4 interrupt will occur if enabled. Therefore, the T4EX input may be used as an additional
external interrupt source.
246
SYSCLK
Overflow
Timer 1
T2EX
CLK
T2
is the frequency of the signal (TCLK) supplied to Timer 4 and [RCAP4H, RCAP4L] is the 16-bit value
CLK
Crossbar
Crossbar
/ ( (65536 - [RCAP4H, RCAP4L] ) * 16)
2
2
EXEN2
TR2
Modes” on page
C/T2
0
1
M
O
S
D
0
0
1
Figure 22.27. T4 Mode 2 Block Diagram
PCON
O
S
T
P
D
L
E
I
216
TCLK
for more information on the UART1 operational modes). In Baud
CP/RL2
RCAP2L
EXEN2
TCLK0
RCLK0
Rev. 1.4
EXF2
C/T2
TR2
TF2
TL2
RCAP2H
TH2
Interrupt
Reload
Timer 2
Overflow
TCLK0
RCLK0
0
1
0
1
16
16
RX0 Clock
TX0 Clock