MC68HC711E9CFU2

Manufacturer Part NumberMC68HC711E9CFU2
DescriptionIC MCU 12K OTP 2MHZ 64-QFP
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC711E9CFU2 datasheets
 

Specifications of MC68HC711E9CFU2

Core ProcessorHC11Core Size8-Bit
Speed2MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory Size12KB (12K x 8)Program Memory TypeOTP
Eeprom Size512 x 8Ram Size512 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case64-QFPLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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Operating Modes and On-Chip Memory
Addr.
Register Name
Analog-to-Digital Results
$1031
Register 1 (ADR1)
See page 64.
Analog-to-Digital Results
$1032
Register 2 (ADR2)
See page 64.
Analog-to-Digital Results
$1033
Register 3 (ADR3)
See page 64.
Analog-to-Digital Results
$1034
Register 4 (ADR4)
See page 64.
Block Protect Register
$1035
(BPROT)
See page 52.
EPROM Programming Control
(1)
$1036
Register (EPROG)
See page 53.
$1037
Reserved
1. MC68HC711E20 only
$1038
Reserved
System Configuration Options
$1039
Register (OPTION)
See page 46.
Arm/Reset COP Timer Circuitry
$103A
Register (COPRST)
See page 81.
EPROM and EEPROM Program-
$103B
ming Control Register (PPROG)
See page 49.
Highest Priority I Bit Interrupt and
$103C
Miscellaneous Register (HPRIO)
See page 41.
RAM and I/O Mapping Register
$103D
(INIT)
See page 45.
Figure 2-7. Register and Control Bit Assignments (Sheet 5 of 6)
38
Bit 7
6
5
Read:
Bit 7
Bit 6
Bit 5
Write:
Reset:
Indeterminate after reset
Read:
Bit 7
Bit 6
Bit 5
Write:
Reset:
Indeterminate after reset
Read:
Bit 7
Bit 6
Bit 5
Write:
Reset:
Indeterminate after reset
Read:
Bit 7
Bit 6
Bit 5
Write:
Reset:
Indeterminate after reset
Read:
Write:
Reset:
0
0
0
Read:
MBE
ELAT
Write:
Reset:
0
0
0
R
R
R
R
R
R
Read:
(1)
ADPU
CSEL
IRQE
Write:
Reset:
0
0
0
Read:
Bit 7
Bit 6
Bit 5
Write:
Reset:
0
0
0
Read:
(2)
ODD
EVEN
ELAT
Write:
Reset:
0
0
0
Read:
RBOOT
SMOD
MDA
Write:
Reset:
0
0
0
Read:
RAM3
RAM2
RAM1
Write:
Reset:
0
0
0
= Unimplemented
I = Indeterminate after reset
M68HC11E Family Data Sheet, Rev. 5.1
4
3
2
1
Bit 4
Bit 3
Bit 2
Bit 1
Bit 4
Bit 3
Bit 2
Bit 1
Bit 4
Bit 3
Bit 2
Bit 1
Bit 4
Bit 3
Bit 2
Bit 1
PTCON
BPRT3
BPRT2
BPRT1
1
1
1
1
EXCOL
EXROW
T1
T0
0
0
0
0
R
R
R
R
R
R
R
R
(1)
(1)
DLY
CME
CR1
1
0
0
0
Bit 4
Bit 3
Bit 2
Bit 1
0
0
0
0
BYTE
ROW
ERASE
EELAT
0
0
0
0
IRV(NE)
PSEL3
PSEL2
PSEL1
0
0
1
1
RAM0
REG3
REG2
REG1
0
0
0
0
R
= Reserved
U = Unaffected
Freescale Semiconductor
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
BPRT0
1
PGM
0
R
R
(1)
CR0
0
Bit 0
0
EPGM
0
PSEL0
0
REG0
1