MC68HC711K4CFN4 Freescale Semiconductor, MC68HC711K4CFN4 Datasheet - Page 49

• Manufacturer Part Number: MC68HC711K4CFN4
• Description: IC MCU 24K OTP 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711K4CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

M68HC11K Family
MOTOROLA
JSR, JUMP TO SUBROUTINE
BSR, BRANCH TO SUBROUTINE
RTS, RETURN FROM
SUBROUTINE
INDEXED, X
INDEXED, Y
INDEXED, Y
DIRECT
PC
PC
MAIN PROGRAM
MAIN PROGRAM
$8D = BSR
RTN
RTN
RTN
RTN
$39 = RTS
PC
PC
PC
PC
NEXT MAIN INSTR.
NEXT MAIN INSTR.
NEXT MAIN INSTR.
NEXT MAIN INSTR.
MAIN PROGRAM
MAIN PROGRAM
MAIN PROGRAM
MAIN PROGRAM
$BD = PRE
$AD = JSR
$AD = JSR
$9D = JSR
$18 = PRE
hh
dd
ff
ff
ll
SP–2
SP–1
SP+1
SP+2
Freescale Semiconductor, Inc.
SP
SP
For More Information On This Product,
7
7
Figure 3-2. Stacking Operations
SP–2
SP–1
STACK
STACK
SP
RTN
RTN
RTN
RTN
Central Processor Unit (CPU)
7
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H
H
L
L
STACK
RTN
RTN
0
0
H
L
0
LEGEND:
RTN
RTN
RTN = ADDRESS OF NEXT INSTRUCTION IN MAIN PROGRAM TO
RTI, RETURN FROM INTERRUPT
SWI, SOFTWARE INTERRUPT
WAI, WAIT FOR INTERRUPT
dd = 8-BIT DIRECT ADDRESS ($0000–$00FF) (HIGH BYTE ASSUMED
hh = HIGH-ORDER BYTE OF 16-BIT EXTENDED ADDRESS
H
ff = 8-BIT POSITIVE OFFSET $00 (0) TO $FF (255) IS ADDED TO INDEX
L
ll = LOW-ORDER BYTE OF 16-BIT EXTENDED ADDRESS
rr= SIGNED RELATIVE OFFSET $80 (–128) TO $7F (+127) (OFFSET
= MOST SIGNIFICANT BYTE OF RETURN ADDRESS
= LEAST SIGNIFICANT BYTE OF RETURN ADDRESS
= STACK POINTER POSITION AFTER OPERATION IS COMPLETE
PC
PC
PC
BE EXECUTED UPON RETURN FROM SUBROUTINE
TO BE $00)
RELATIVE TO THE ADDRESS FOLLOWING THE MACHINE CODE
OFFSET BYTE)
INTERRUPT ROUTINE
MAIN PROGRAM
MAIN PROGRAM
$3F = SWI
$3E = WAI
$3B = RTI
Central Processor Unit (CPU)
SP+1
SP+2
SP+3
SP+4
SP+5
SP+6
SP+7
SP+8
SP+9
SP–9
SP–8
SP–7
SP–6
SP–5
SP–4
SP–3
SP–2
SP–1
SP
SP
7
7
STACK
STACK
ACCB
ACCA
ACCB
ACCA
RTN
RTN
RTN
RTN
CCR
CCR
IX
IY
IX
IY
IX
IY
IX
IY
CPU Registers
Technical Data
H
H
H
L
H
L
L
L
H
L
H
L
0
0
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