MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 138

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MC68HC711P2CFN4

Manufacturer Part Number
MC68HC711P2CFN4
Description
IC MCU 32K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711P2CFN4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Timing System
Technical Data
maximum count, the counter rolls over to $0000, sets an overflow flag
and continues to increment. As long as the MCU is running in a normal
operating mode, there is no way to reset, change or interrupt the
counting. The capture/compare subsystem features three input capture
channels, four output compare channels and one channel that can be
selected to perform either input capture or output compare. Each of the
three input capture functions has its own 16-bit input capture register
(time capture latch) and each of the output compare functions has its
own 16-bit compare register. All timer functions, including the timer
overflow and RTI, have their own interrupt controls and separate
interrupt vectors.
The pulse accumulator contains an 8-bit counter and edge select logic.
The pulse accumulator can operate in either event counting mode or
gated time accumulation mode. During event counting mode, the pulse
accumulator’s 8-bit counter increments when a specified edge is
detected on an input signal. During gated time accumulation mode, an
internal clock source increments the 8-bit counter while an input signal
has a predetermined logic level.
The real-time interrupt (RTI) is a programmable periodic interrupt circuit
that permits pacing the execution of software routines by selecting one
of four interrupt rates.
The COP watchdog clock input (E/2
running counter chain. The COP automatically times out unless it is
serviced within a specific time by a program reset sequence. If the COP
is allowed to time out, a reset is generated, which drives the RESET pin
low to reset the MCU and the external system. Refer to
crystal related frequencies and periods.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Timing System
15
) is tapped off from the free-
MC68HC11P2 — Rev 1.0
Table 8-1
for

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