MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 148

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MC68HC711P2CFN4

Manufacturer Part Number
MC68HC711P2CFN4
Description
IC MCU 32K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711P2CFN4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Timing System
8.5.2 CFORC — Timer compare force register
8.5.3 OC1M — Output compare 1 mask register
Technical Data
Output compare 1 mask (OC1M) $000C
Timer compare force (CFORC)
The CFORC register allows forced early compares. FOC[1:5]
correspond to the five output compares. These bits are set for each
output compare that is to be forced. The action taken as a result of a
forced compare is the same as if there were a match between the OCx
register and the free-running counter, except that the corresponding
interrupt status flag bits are not set. The forced channels trigger their
programmed pin actions to occur at the next timer count transition after
the write to CFORC.
The CFORC bits should not be used on an output compare function that
is programmed to toggle its output on a successful compare because a
normal compare that occurs immediately before or after the force can
result in an undesirable operation.
FOC[1:5] — Force output compares
Bits [2:0] — Not implemented; always read zero
Use OC1M with OC1 to specify the bits of port A that are affected by a
successful OC1 compare. The bits of the OC1M register correspond to
PA7–PA3.
OC1M[7:3] — Output compare masks for OC1
Freescale Semiconductor, Inc.
Address bit 7
Address bit 7
For More Information On This Product,
$000B FOC1 FOC2 FOC3 FOC4 FOC5
1 = A forced output compare action will occur on the specified pin.
0 = No action.
1 = OC1 is configured to control the corresponding pin of port A.
OC1M
Go to: www.freescale.com
7
Timing System
OC1M
bit 6
bit 6
6
OC1M
bit 5
bit 5
5
OC1M
bit 4
bit 4
4
OC1M
bit 3
bit 3
3
bit 2
bit 2
0
0
MC68HC11P2 — Rev 1.0
bit 1
bit 1
0
0
bit 0
bit 0
0
0
0000 0000
0000 0000
on reset
on reset
State
State

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