MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 165

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MC68HC711P2CFN4

Manufacturer Part Number
MC68HC711P2CFN4
Description
IC MCU 32K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711P2CFN4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Pulse width clock select (PWCLK) $0060 CON34CON12PCKA2PCKA1
8.9.2 PWCLK — PWM clock prescaler and 16-bit select register
8.9.2.1 16-bit PWM function
MC68HC11P2 — Rev 1.0
This register contains bits for selecting the 16-bit PWM options and for
selecting the prescaler values for the clocks.
The PWCLK register contains two control bits, each of which is used to
concatenate a pair of PWM channels into one 16-bit channel. Channels
3 and 4 are concatenated with the CON34 bit, and channels 1 and 2 are
concatenated with the CON12 bit.
When the 16-bit concatenated mode is selected, the clock source is
determined by the low order channel. Channel 2 is the low order channel
when channels 1 and 2 are concatenated. Channel 4 is the low order
channel when channels 3 and 4 are concatenated. The pins associated
with channels 1 and 3 can be used for general-purpose I/O when 16-bit
PWM mode is selected.
Channel 1 registers are the high order byte of the double-byte channel
when channels 1 and 2 are concatenated. Channel 3 registers are the
high order byte of the double-byte channel when channels 3 and 4 are
concatenated. Reads of the high order byte cause the low order byte to
be latched for one cycle to guarantee that double byte reads are
accurate. Writes to the low byte of the counter cause reset of the entire
counter. Writes to the upper bytes of the counter have no effect.
CON34 — Concatenate channels 3 and 4
Freescale Semiconductor, Inc.
When concatenated, channel 3 is the high-order byte and the channel
4 pin (PH3) is the output.
Address bit 7
For More Information On This Product,
1 = Channels 3 and 4 are concatenated into one 16-bit PWM
0 = Channels 3 and 4 are separate 8-bit PWMs.
channel.
Go to: www.freescale.com
Timing System
bit 6
bit 5
bit 4
bit 3
0
Pulse-width modulation (PWM) timer
PCKB3PCKB2PCKB1 0000 0000
bit 2
bit 1
bit 0
Technical Data
Timing System
on reset
State

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