MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 180

• Manufacturer Part Number: MC68HC711P2CFN4
• Description: IC MCU 32K OTP 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711P2CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Analog-to-Digital Converter
9.5 Channel assignments
9.5.1 Single-channel operation
Technical Data
The multiplexer allows the A/D converter to select one of sixteen analog
signals. Eight of these channels correspond to port E input lines to the
MCU, four others are internal reference points or test functions; the
remaining four channels are reserved. Refer to
There are two types of single-channel operation. In the first type (SCAN
= 0), the single selected channel is converted four consecutive times.
The first result is stored in A/D result register 1 (ADR1), and the fourth
result is stored in ADR4. After the fourth conversion is complete, all
conversion activity is halted until a new conversion command is written
to the ADCTL register. In the second type of single-channel operation
(SCAN = 1), conversions continue to be performed on the selected
channel with the fifth conversion being stored in register ADR1
(overwriting the first conversion result), the sixth conversion overwriting
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 9-1. A/D converter channel assignments
Analog-to-Digital Converter
Go to: www.freescale.com
1. Used for factory testing.
Channel
number
9–12
13
14
15
16
1
2
3
4
5
6
7
8
reserved
Channel
reserved
signal
V
V
V
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
RH
RH
RL
/2
(1)
*
*
*
Result in ADRx
if MULT = 1
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
—
Table
MC68HC11P2 — Rev 1.0
9-1.