MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 258

• Manufacturer Part Number: MC68HC711P2CFN4
• Description: IC MCU 32K OTP 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711P2CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Glossary
direct memory access module (DMA) — A M68HC08 Family module that can perform data
DMA — See "direct memory access module (DMA)."
DMA service request — A signal from a peripheral to the DMA module that enables the DMA
duty cycle — A ratio of the amount of time the signal is on versus the time it is off. Duty cycle is
EEPROM — Electrically erasable, programmable, read-only memory. A nonvolatile type of
EPROM — Erasable, programmable, read-only memory. A nonvolatile type of memory that can
exception — An event such as an interrupt or a reset that stops the sequential execution of the
external interrupt module (IRQ) — A module in the M68HC08 Family with both dedicated
fetch — To copy data from a memory location into the accumulator.
firmware — Instructions and data programmed into nonvolatile memory.
free-running counter — A device that counts from zero to a predetermined number, then rolls
full-duplex transmission — Communication on a channel in which data can be sent and
H — The upper byte of the 16-bit index register (H:X) in the CPU08.
H — The half-carry bit in the condition code register of the CPU08. This bit indicates a carry from
hexadecimal — Base 16 numbering system that uses the digits 0 through 9 and the letters A
Technical Data
transfers between any two CPU-addressable locations without CPU intervention. For
transmitting or receiving blocks of data to or from peripherals, DMA transfers are faster
and more code-efficient than CPU interrupts.
module to transfer data.
usually represented by a percentage.
memory that can be electrically reprogrammed.
be erased by exposure to an ultraviolet light source and then reprogrammed.
instructions in the main program.
external interrupt pins and port pins that can be enabled as interrupt pins.
over to zero and begins counting again.
received simultaneously.
the low-order four bits of the accumulator value to the high-order four bits. The half-carry
bit is required for binary-coded decimal arithmetic operations. The decimal adjust
accumulator (DAA) instruction uses the state of the H and C bits to determine the
appropriate correction factor.
through F.
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Glossary
MC68HC11P2 — Rev 1.0