MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 52

• Manufacturer Part Number: MC68HC711P2CFN4
• Description: IC MCU 32K OTP 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711P2CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Highest priority interrupt (HPRIO) $003C
Operating Modes and On-Chip Memory
3.5.1.1 HPRIO — Highest priority I-bit interrupt & misc. register
Technical Data
NOTE:
stand-by power input (VSTBY), which allows the RAM contents to be
maintained in the absence of V
Refer to
control bits and the four operating modes.
A normal mode is selected when MODB is logic one during reset. One
of three reset vectors is fetched from address $FFFA–$FFFF, and
program execution begins from the address indicated by this vector. If
MODB is logic zero during reset, the special mode reset vector is fetched
from addresses $BFFA–$BFFF and software has access to special test
features. Refer to
RBOOT, SMOD and MDA bits depend on the power-up initialization
mode and can only be written in special modes when SMOD = 1. Refer
to
RBOOT — Read bootstrap ROM
SMOD — Special mode select
MDA — Mode select A
Table
Freescale Semiconductor, Inc.
Once cleared, cannot be set again.
Address bit 7
For More Information On This Product,
1 = Bootloader ROM enabled, at $BE40–$BFFF.
0 = Bootloader ROM disabled and not in map.
1 = Special mode variation in effect.
0 = Normal mode variation in effect.
1 = Normal expanded or special test mode. (Expanded buses
0 = Normal single chip or special bootstrap mode. (Ports active.)
Operating Modes and On-Chip Memory
Table
3-4.
active.)
RBOO
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T
3-4, which is a summary of mode pin operation, the mode
Resets and
SMOD MDA PSEL4 PSEL3 PSEL2 PSEL1 PSEL0 xxx0 0110
bit 6
bit 5
Interrupts.
DD
bit 4
.
bit 3
bit 2
MC68HC11P2 — Rev 1.0
bit 1
bit 0
on reset
State