MC68HC711P2CFN4 Freescale Semiconductor, MC68HC711P2CFN4 Datasheet - Page 71

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MC68HC711P2CFN4

Manufacturer Part Number
MC68HC711P2CFN4
Description
IC MCU 32K OTP 4MHZ 84-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711P2CFN4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
640 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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3.6.4 RAM and EEPROM security
MC68HC11P2 — Rev 1.0
Configuration control (CONFIG) $003F
The optional security feature protects the contents of EEPROM and
RAM from unauthorized access. A program, or a key portion of a
program, can be protected against duplication. To accomplish this, the
protection mechanism restricts operation of protected devices to single
chip modes, and thus prevents the memory locations from being
monitored externally (single chip modes do not allow visibility of the
internal address and data buses). Resident programs, however, have
unlimited access to the internal EEPROM and RAM and can read, write,
or transfer the contents of these memories. The NOSEC bit in the
CONFIG register disables this feature on devices that incorporate it.
Contact a Motorola representative for information on the availability of
this feature.
If the security feature is present and enabled and bootstrap mode is
selected, then the following sequence is performed by the bootstrap
program:
If all the above operations are successful, the bootloading process
continues as if the device has not been secured.
CONFIG — System configuration register
For a description of the other bits contained in the CONFIG register refer
1. Output $FF on the SCI.
2. Turn block protect off. Clear BPROT register.
3. IF EEPROM is enabled, erase it all.
4. Verify that the EEPROM is erased; if not, begin sequence again.
5. Write $FF to every RAM byte.
6. Erase the CONFIG register.
Freescale Semiconductor, Inc.
Address bit 7
For More Information On This Product,
Operating Modes and On-Chip Memory
ROMA
Go to: www.freescale.com
D
bit 6
1
bit 5
1
PAREN
bit 4
EPROM, EEPROM and CONFIG register
NOSE
Operating Modes and On-Chip Memory
bit 3
C
NOCO
bit 2
P
ROMO
bit 1
N
EEON x11x 1xxx
bit 0
Technical Data
on reset
State

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