HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 253

IC H8S MCU FLASH 256K 144-QFP

HD64F2676VFC33

Manufacturer Part Number
HD64F2676VFC33
Description
IC H8S MCU FLASH 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2676VFC33

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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2.2.66
SUBS (SUBtract with Sign extension)
Operation
Rd – 1
Rd – 2
Rd – 4
Assembly-Language Format
SUBS #1, ERd
SUBS #2, ERd
SUBS #4, ERd
Operand Size
Longword
Description
This instruction subtracts the immediate value 1, 2, or 4 from the contents of a 32-bit register ERd
(destination operand). Unlike the SUB instruction, it does not affect the condition-code flags.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Notes
Register direct
Register direct
Register direct
Addressing
Mode
SUBS
ERd
ERd
ERd
Mnemonic
SUBS
SUBS
SUBS
Operands
#1, ERd
#2, ERd
#4, ERd
1st byte
1
1
1
B
B
B
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
2nd byte
0
8
9
Instruction Format
Rev. 4.00 Feb 24, 2006 page 237 of 322
I
0 erd
0 erd
0 erd
UI H
Section 2 Instruction Descriptions
Subtract Binary Address Data
3rd byte
U
N
4th byte
REJ09B0139-0400
Z
— —
V
States
No. of
C
1
1
1

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