EG80C196EA Intel, EG80C196EA Datasheet
EG80C196EA
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EG80C196EA Summary of contents
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... Sixteen 10-bit A/D channels with auto-scan mode and dedicated results registers Notice: This document contains preliminary information on new products in production. The spec- ifications are subject to change without notice. Verify with your local Intel sales office that you have the latest datasheet before finalizing a design. Preliminary Datasheet ...
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... Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right ...
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Product Overview 2.0 Nomenclature Overview 3.0 Pinout .......................................................................................................................... 3 4.0 Signals ........................................................................................................................ 7 5.0 Address Map 6.0 Electrical Characteristics 6.1 DC Characteristics ........................................................................................ 11 6.2 AC Characteristics — Multiplexed Bus Mode................................................ 13 6.3 AC Characteristics — Demultiplexed Bus Mode ...
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Commercial Figures 1 80C196EA Block Diagram ...............................................................................1 2 Product Nomenclature .....................................................................................2 3 S80C196EA 160-pin QFP Package .................................................................3 4 System Bus Timing Diagram (Multiplexed Bus Mode) ...................................15 5 READY Timing Diagram (Multiplexed Bus Mode)..........................................16 6 System Bus Timing Diagram ...
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Product Overview The 80C196EA are typically used for high speed event control systems. Commercial applications include modem, motor-control systems, printers, photocopiers, air-conditioner control systems, disk drives and medical instruments especially well suited to applications that benefit from ...
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... Temperature and Burn-in Options Packaging Options Program Memory Options Process Information Product Family Device Speed XXXXX Options Commercial operating temperature range (0° 70° C Ambient) with Intel standard burn-in. S QFP 0 CPU only - no internal ROM C CHMOS 196EA no mark 40 MHz XX A2815-01 Description Preliminary Datasheet ...
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Pinout Figure 3. S80C196EA 160-pin QFP Package AD0 / P3.0 1 AD1 / P3.1 2 AD2 / P3.2 3 AD3 / P3.3 4 AD4 / P3.4 5 AD5 / P3.5 6 AD6 / P3.6 7 AD7 / P3.7 8 ...
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Commercial Table 2. 80C196EA 160-pin QFP Package Pin Assignments Pin Name 1 AD0 / P3.0 2 AD1 / P3.1 3 AD2 / P3.2 4 AD3 / P3.3 5 AD4 / P3.4 6 AD5 / P3.5 7 AD6 / ...
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Table 3. Pin Assignment Arranged by Functional Categories (Sheet Addr & Data Name Pin A0 143 A1 144 A2 145 A3 146 A4 147 A5 148 A6 149 A7 150 A8 153 A9 154 A10 155 A11 ...
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Commercial Table 3. Pin Assignment Arranged by Functional Categories (Sheet Name ANGND 10, 30 11, 12, 29, 50, 61, 68, 69, 94, 101, 128, 151 REF ...
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Signals Table 4. Signal Descriptions (Sheet Name Type ALE O BHE# O CLKOUT O EXTINT I INST O NMI I ONCE I Preliminary Datasheet Description Address Latch Enable This active-high output signal is asserted only during ...
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... If this pin is held low during reset, the device will enter a test mode. The value of several other pins defines the actual test mode. All test modes, except test-ROM execution, are reserved for Intel factory use. If you choose to configure this signal as an input, always hold it high during reset and ensure that your system meets the V specification to prevent inadvertent entry into test mode ...
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Table 4. Signal Descriptions (Sheet Name Type WRL# O XTAL1 I XTAL2 O Preliminary Datasheet Description † Write Low During 16-bit bus cycles, this active-low output signal is asserted for low-byte writes and word writes to external ...
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Commercial 5.0 Address Map Table 5. 80C196EA Address Map Hex Address FFFFFF External device (memory or I/O) connected to address/data bus FF4000 FF3FFF Program memory FF2140 FF213F Special-purpose memory (PIH vectors) FF20C0 FF20BF Program memory FF2080 (After reset, ...
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... The specifications are subject to change without notice. ............... –0 +7 Verify with your local Intel sales office that you have the latest datasheet before finalizing a design. WARNING: Stressing the device beyond the “Absolute Maximum Ratings” may cause permanent damage. These are stress ratings only. = 4.5 V – ...
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Commercial Table 6. DC Characteristics at V Sym V Input high voltage IH2 Output low voltage V (output configured as OL1 complementary) Output high voltage V (output configured as OH1 complementary) V Output low voltage in reset OL2 ...
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AC Characteristics — Multiplexed Bus Mode Test Conditions: Capacitive load on all pins = 50 pF, Rise and Fall Times = 3 ns. Table 7. AC Characteristics, Multiplexed Bus Mode (Sheet Symbol Frequency on XTAL1, PLL ...
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Commercial Table 7. AC Characteristics, Multiplexed Bus Mode (Sheet Symbol T Data Hold after WR# High WHQX T WR# High to ALE High WHLH T BHE#, INST Hold after WR# High WHBX T AD15:8, CS ...
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Figure 4. System Bus Timing Diagram (Multiplexed Bus Mode) CLKOUT ALE RD# AD15:0 (read) WR# AD15:0 (write) BHE#, INST AD15:8 A20: Preliminary Datasheet T CLCL T t CHDV T T CLLH RLCL T LLCH T LHLH T ...
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Commercial Figure 5. READY Timing Diagram (Multiplexed Bus Mode) CLKOUT READY ALE RD# AD15:0 (read) WR# AD15:0 (write) BHE#, INST A20: CLYX T AVYV T (min) CLYX T RLRH T RLDV T + ...
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AC Characteristics — Demultiplexed Bus Mode Test Conditions: Capacitive load on all pins = 50 pF, Rise and Fall Times = 3 ns. Table 9. AC Characteristics, Demultiplexed Bus Mode Symbol Frequency on XTAL1, PLL in 1x mode F ...
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Commercial Figure 6. System Bus Timing Diagram (Demultiplexed Bus Mode) CLKOUT ALE RD# AD15:0 (read) WR# AD15:0 (write) BHE#, INST A20 CHCL CLCL T CLLH T T AVRL RLRH T CHDV T ...
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Figure 7. READY Timing Diagram (Demultiplexed Bus Mode) CLKOUT READY ALE RD# AD15:0 (read) WR# AD15:0 (write) BHE#, INST A20: Preliminary Datasheet (min) AVYV CHYX T LHLH RLRH ...
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Commercial 6.4 Deferred Bus Timing Mode Deferred Bus Cycle Mode: This bus mode (enabled by setting CCB1.5) reduces bus contention when using the 80C196EA in demultiplexed mode with slow memories. As shown in delay of 2t occurs in ...
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AC Characteristics — Serial Port, Shift Register Mode Table 10. Serial Port Timing — Shift Register Mode Symbol Serial Port Clock period T SP_BAUD XLXL SP_BAUD Serial Port Clock falling edge to rising edge T SP_BAUD XLXH SP_BAUD T ...
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Commercial 6.6 AC Characteristics — Synchronous Serial Port Table 11. Synchronous Serial Port Timing Symbol T Synchronous Serial Port Clock period CLCL T Synchronous Serial Port Clock falling edge to rising edge CLCH T Setup time for MSB ...
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A/D Sample and Conversion Times Two parameters, sample time and conversion time, control the time required for an A/D conversion. The sample time is the length of time that the analog input voltage is actually connected to the sample ...
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Commercial 6.7.1 AC Characteristics — A/D Converter, 10-bit Mode Table 12. 10-bit A/D Operating Conditions (1) Symbol T Ambient Temperature A V Digital Supply Voltage CC V Analog Supply Voltage REF T Sample Time SAM T Conversion Time ...
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AC Characteristics — A/D Converter, 8-bit Mode Table 14. 8-bit A/D Operating Conditions (1) Symbol T Ambient Temperature A V Digital Supply Voltage CC V Analog Supply Voltage REF T Sample Time SAM T Conversion Time CONV NOTES: 1. ...
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Commercial 6.8 External Clock Drive Table 16. External Clock Drive Symbol 1/T Oscillator Frequency (F XLXL T Oscillator Period (T XLXL T High Time XHXX T Low Time XLXX T Rise Time XLXH T Fall Time XHXL NOTES: ...
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Test Output Waveforms Figure 12. AC Testing Output Waveforms 3.5 V 0.45 V Note: AC testing inputs are driven at 3.5 V for a logic “1” and 0.45 V for a logic “0”. Timing measurements are made at 2.0 ...
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... The 80C196EA may contain design defects or errors known as errata. Characterized errata that may cause the 80C196EA’s behavior to deviate from published specifications are documented in a specification update. Specification updates can be obtained from your local Intel sales office or from the World Wide Web (www.intel.com). ...