MC68HC11E0CFNE3 Freescale Semiconductor, MC68HC11E0CFNE3 Datasheet - Page 102

• Manufacturer Part Number: MC68HC11E0CFNE3
• Description: IC MCU 8BIT 3MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11E0CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Controller Family/series: 68HC11
• No. Of I/o's: 38
• Ram Memory Size: 512Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Digital Ic Case Style: LCC
• Rohs Compliant: Yes
• Processor Series: HC11E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

9-16
MAIN TIMER
(FROM MAIN TIMER)
PAI/OC1
FROM
Pulse accumulator control bits are also located within two timer registers, TMSK2 and
TFLG2, as described in the following paragraphs.
E ÷ 64 CLOCK
OC1
PA7/
Pulse Accumulator (in Gated Mode)
Cycle Time
CPU Clock
(E/2
(E/2
OUTPUT
BUFFER
14
6
)
)
EDGE DETECTION
INPUT BUFFER
PACTL
&
Freescale Semiconductor, Inc.
Table 9-3 Pulse Accumulator Timing
Selected Crystal
For More Information On This Product,
Figure 9-3 Pulse Accumulator
overflow -
1 count -
TMSK2
(1/E)
(E)
Go to: www.freescale.com
TIMING SYSTEM
16.384 ms
4.0 MHz
1.0 MHz
1000 ns
64.0 µs
MUX
2:1
INTERNAL
DATA BUS
Common XTAL Frequencies
PAI EDGE
PAEN
OVERFLOW
ENABLE
8.192 ms
8.0 MHz
2.0 MHz
32.0 µs
500 ns
TFLG2
8-BIT COUNTER
PACNT
FLAG SETTING
TECHNICAL DATA
DISABLE
11 PULSE ACC BLOCK
INTERRUPT
REQUESTS
1
2
12.0 MHz
5.461 ms
21.33 µs
3.0 MHz
333 ns