MC68HC11E0CFNE3 Freescale Semiconductor, MC68HC11E0CFNE3 Datasheet - Page 16

IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E0CFNE3

Manufacturer Part Number
MC68HC11E0CFNE3
Description
IC MCU 8BIT 3MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC11E0CFNE3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Controller Family/series
68HC11
No. Of I/o's
38
Ram Memory Size
512Byte
Cpu Speed
3MHz
No. Of Timers
1
Embedded Interface Type
SCI, SPI
Digital Ic Case Style
LCC
Rohs Compliant
Yes
Processor Series
HC11E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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2.4 E-Clock Output (E)
2.5 Interrupt Request (IRQ)
2.6 Non-Maskable Interrupt (XIRQ)
2-4
*
FIRST
MCU
THIS VALUE INCLUDES ALL STRAY CAPACITANCES.
E is the output connection for the internally generated E clock. The signal from E is
used as a timing reference. The frequency of the E-clock output is one fourth that of
the input frequency at the XTAL and EXTAL pins. When E-clock output is low, an in-
ternal process is taking place. When it is high, data is being accessed. All clocks, in-
cluding the E clock, are halted when the MCU is in STOP mode. The E clock can be
turned off in single-chip modes to reduce the effects of radio frequency interference
(RFI).
The IRQ input provides a means of applying asynchronous interrupt requests to the
MCU. Either negative edge-sensitive triggering or level-sensitive triggering is program
selectable (OPTION register). IRQ is always configured to level-sensitive triggering at
reset. Connect an external pullup resistor, typically 4.7 k , to V
in a level sensitive wired-OR configuration.
The XIRQ input provides a means of requesting a nonmaskable interrupt after reset
initialization. During reset, the X bit in the condition code register (CCR) is set and any
interrupt is masked until MCU software enables it. Because the XIRQ input is level-
EXTAL
XTAL
MCU
Figure 2-5 External Oscillator Connections
Figure 2-6 One Crystal Driving Two MCUs
EXTAL
10 M
XTAL
Freescale Semiconductor, Inc.
For More Information On This Product,
NC
Go to: www.freescale.com
CRYSTAL
4 x E
PIN DESCRIPTIONS
25 pF
25 pF
EXTERNAL OSCILLATOR
*
*
CMOS-COMPATIBLE
4 x E
EXT EXTAL CONN
220
DD
when IRQ is used
NC
TECHNICAL DATA
DUAL-MCU XTAL CONN
EXTAL
XTAL
SECOND
MCU

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