MC68HC11E0CFNE3 Freescale Semiconductor, MC68HC11E0CFNE3 Datasheet - Page 74

• Manufacturer Part Number: MC68HC11E0CFNE3
• Description: IC MCU 8BIT 3MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11E0CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Controller Family/series: 68HC11
• No. Of I/o's: 38
• Ram Memory Size: 512Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Digital Ic Case Style: LCC
• Rohs Compliant: Yes
• Processor Series: HC11E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

BAUD — Baud Rate
NF — Noise Error Flag
FE — Framing Error
7.6.5 Baud Rate Register (BAUD)
TCLR — Clear Baud Rate Counters (Test)
RCKB — SCI Baud Rate Clock Check (Test)
SCP1, SCP0 — SCI Baud Rate Prescaler Selects
SCR[2:0] — SCI Baud Rate Selects
7-8
RESET:
NF is set if majority sample logic detects anything other than a unanimous decision.
Clear NF by reading SCSR with NF set and then reading SCDR.
FE is set when a 0 is detected where a stop bit was expected. Clear the FE flag by
reading SCSR with FE set and then reading SCDR.
Use this register to select different baud rates for the SCI system. The SCP[1:0] bits
function as a prescaler for the SCR[2:0] bits. Together, these five bits provide multiple
baud rate combinations for a given crystal frequency. Normally, this register is written
once during initialization. The prescaler is set to its fastest rate by default out of reset,
and can be changed at any time. Refer to Table 7-1 and Table 7-2 for normal baud
rate selections.
These two bits select a prescale factor for the SCI baud rate generator that determines
the highest possible baud rate.
These three bits select receiver and transmitter bit rate based on output from baud rate
prescaler stage.
0 = Unanimous decision
1 = Noise detected
0 = Stop bit detected
1 = 0 detected
TCLR
Bit 7
0
SCP[1:0]
0 0
0 1
1 0
1 1
Freescale Semiconductor, Inc.
6
0
0
Table 7-1 Baud Rate Prescale Selects
For More Information On This Product,
SERIAL COMMUNICATIONS INTERFACE
Internal Clock
Divide
SCP1
By
13
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1
3
4
5
0
15.625 K
SCP0
4.0 MHz
62.50 K
20.83 K
(Baud)
4800
4
0
Crystal Frequency in MHz
8.0 MHz
125.0 K
41.67 K
31.25 K
(Baud)
RCKB
9600
3
0
10.0 MHz
156.25 K
52.08 K
12.02 K
(Baud)
38.4 K
SCR2
U
2
12.0 MHz
187.5 K
46.88 K
14.42 K
(Baud)
62.5 K
SCR1
TECHNICAL DATA
U
1
$002B
SCR0
Bit 0
U