MC68HC11E0CFNE3 Freescale Semiconductor, MC68HC11E0CFNE3 Datasheet - Page 98

• Manufacturer Part Number: MC68HC11E0CFNE3
• Description: IC MCU 8BIT 3MHZ 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11E0CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Controller Family/series: 68HC11
• No. Of I/o's: 38
• Ram Memory Size: 512Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Digital Ic Case Style: LCC
• Rohs Compliant: Yes
• Processor Series: HC11E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

PR[1:0] — Timer Prescaler Select
9.3.10 Timer Interrupt Flag 2 Register
TOF — Timer Overflow Interrupt Flag
RTIF — Real-Time (Periodic) Interrupt Flag
PAOVF — Pulse Accumulator Overflow Interrupt Flag
PAIF — Pulse Accumulator Input Edge Interrupt Flag
Bits [3:0]— Not implemented
9.4 Real-Time Interrupt
9-12
TFLG2 — Timer Interrupt Flag 2
RESET:
These bits are used to select the prescaler divide-by ratio. In normal modes, PR[1:0]
can only be written once, and the write must be within 64 cycles after reset. Refer to
Table 9-1 for specific timing values.
Bits in this register indicate when certain timer system events have occurred. Coupled
with the four high-order bits of TMSK2, the bits of TFLG2 allow the timer subsystem to
operate in either a polled or interrupt driven system. Each bit of TFLG2 corresponds
to a bit in TMSK2 in the same position.
Clear flags by writing a one to the corresponding bit position(s).
Set when TCNT changes from $FFFF to $0000
Refer to 9.4 Real-Time Interrupt.
Refer to 9.6 Pulse Accumulator.
Refer to 9.6 Pulse Accumulator.
Always read zero
The real-time interrupt feature, used to generate hardware interrupts at a fixed periodic
rate, is controlled and configured by two bits (RTR1 and RTR0) in the pulse accumu-
lator control (PACTL) register. The RTII bit in the TMSK2 register enables the interrupt
capability. The four different rates available are a product of the MCU oscillator fre-
quency and the value of bits RTR[1:0]. Refer to the following table, which shows the
periodic real-time interrupt rates.
Bit 7
TOF
0
RTIF
Freescale Semiconductor, Inc.
6
0
For More Information On This Product,
PAOVF
PR[1:0]
Go to: www.freescale.com
5
0
0 0
0 1
1 0
1 1
TIMING SYSTEM
PAIF
4
0
Prescaler
16
1
4
8
3
0
0
2
0
0
TECHNICAL DATA
1
0
0
$0025
Bit 0
0
0