MC68HC711D3CFNE2 Freescale Semiconductor, MC68HC711D3CFNE2 Datasheet - Page 115

IC MCU 8BIT 3MHZ 44-PLCC

MC68HC711D3CFNE2

Manufacturer Part Number
MC68HC711D3CFNE2
Description
IC MCU 8BIT 3MHZ 44-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711D3CFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
26
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC711D3CFNE2
Manufacturer:
ALLEGEO
Quantity:
4 492
Part Number:
MC68HC711D3CFNE2
Manufacturer:
FREESCALE
Quantity:
1 489
Part Number:
MC68HC711D3CFNE2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Num
TECHNICAL DATA
10
11
12
13
NOTES:
1
2
3
4
5
6
7
8
9
1. All timing is shown with respect to 20% V
2. Signal production depends on software.
3. Assumes 100 pF load on all SPI pins.
Cycle Time
Enable Lead Time
Enable Lag Time
Clock (SCK) High Time
Clock (SCK) Low Time
Data Setup Time (Inputs)
Data Hold Time (Inputs)
Access Time
Disable Time
Data Valid (After Enable Edge) (Note 3)
Data Hold Time (Outputs) (After Enable Edge)
Rise Time (20% V
Fall Time (70% V
Master
Slave
Master
Slave
Master (Note 2)
Slave
Master (Note 2)
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
(Time to Data Active from High-Imp. State)
Slave
(Hold Time to High-Impedance State)
Slave
SPI Outputs (SCK, MOSI, and MISO)
SPI Inputs (SCK, MOSI, MISO, and SS)
SPI Outputs (SCK, MOSI, and MISO)
SPI Inputs (SCK, MOSI, MISO, and SS)
Operating Frequency
DD
Characteristic
DD
Table A-7 Serial Peripheral Interface Timing
to 20% V
to 70% V
Freescale Semiconductor, Inc.
For More Information On This Product,
DD
DD
ELECTRICAL CHARACTERISTICS
, C
, C
L
L
Go to: www.freescale.com
= 200 pF)
= 200 pF)
DD
and 70% V
t
t
t
t
w(SCKH)m
Symbol
w(SCKL)m
w(SCKH)s
DD
w(SCKL)s
t
t
t
t
t
lead(m)
f
t
t
cyc(m)
lead(s)
f
lag(m)
t
op(m)
cyc(s)
t
lag(s)
su(m)
op(s)
t
t
su(s)
h(m)
t
t
t
t
h(s)
v(s)
, unless otherwise noted.
t
t
t
dis
ho
rm
fm
rs
fs
a
Min
500
250
250
340
190
340
190
100
100
100
100
2.0
dc
dc
0
0
2.0 MHz
Max
120
240
240
100
100
0.5
2.0
2.0
2.0
Min
333
240
240
340
190
340
190
100
100
100
100
2.0
dc
dc
0
0
3.0 MHz
Max
120
167
167
100
100
0.5
3.0
2.0
2.0
A-11
MHz
Unit
t
f
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
µs
cyc
op

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