M30626FJPFP#D5C Renesas Electronics America, M30626FJPFP#D5C Datasheet - Page 150

• Manufacturer Part Number: M30626FJPFP#D5C
• Description: MCU 3/5V 512K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPFP#D5C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 14.6
(4) When the source read cycle under condition (2) has one wait state inserted
(1) When the transfer unit is 8 or 16 bits and the source of transfer is an even address
(2) When the transfer unit is 16 bits and the source address of transfer is an odd address, or when the
(3) When the source read cycle under condition (1) has one wait state inserted
BCLK
Address
bus
RD signal
WR signal
Data bus
BCLK
Address
bus
RD signal
WR signal
Data bus
BCLK
Address
bus
RD signal
WR signal
Data bus
BCLK
Address
bus
RD signal
WR signal
Data bus
transfer unit is 16 bits and an 8-bit bus is used
NOTES :
Jan 10, 2006
1. The same timing changes occur with the respective conditions at the destination as at the source.
Transfer Cycles for Source Read
CPU use
CPU use
CPU use
CPU use
CPU use
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CPU use
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Source
Source
Source
Source
Source
Source
Source + 1
Source
Source
Destination
Source + 1
Destination
Destination
Destination
Source + 1
Destination
Destination
Source + 1
Dummy
cycle
Dummy
cycle
Dummy
cycle
Dummy
cycle
Destination
Dummy
cycle
Dummy
cycle
Destination
CPU use
CPU use
CPU use
CPU use
CPU use
CPU use
Dummy
cycle
Dummy
cycle
CPU use
CPU use
14. DMAC