M30626FJPFP#D5C Renesas Electronics America, M30626FJPFP#D5C Datasheet - Page 179

MCU 3/5V 512K 100-QFP

M30626FJPFP#D5C

Manufacturer Part Number
M30626FJPFP#D5C
Description
MCU 3/5V 512K 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet

Specifications of M30626FJPFP#D5C

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
15.2.3
Table 15.8
NOTES:
Count Source
Count Operation
Count Start Condition
Count Stop Condition
Interrupt Request
Generation Timing
TBiIN Pin Function
Read from Timer
Write to Timer
1. Interrupt request is not generated when the first effective edge is input after the timer started
2. Value read from TBi register is indeterminate until the second valid edge is input after the timer
3. The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register, and the TB3S to
In pulse period and pulse width measurement mode, the timer measures pulse period or pulse width of an
external signal (see Table 15.8). Figure 15.21 shows TBiMR Register in Pulse Period and Pulse Width
Measurement Mode. Figure 15.22 shows the Operation Timing when Measuring a Pulse Period. Figure 15.23
shows the Operation Timing when Measuring a Pulse Width.
counting.
starts counting.
TB5S bits are assigned to the bit 5 to bit 7 in the TBSR register.
Jan 10, 2006
Item
Pulse Period and Pulse Width Measurement Mode
Specifications in Pulse Period and Pulse Width Measurement Mode
Page 162 of 390
f1, f2, f8, f32, fC32
• Up-count
• Counter value is transferred to reload register at an effective edge of
Set TBiS (i=0 to 5) bit
Set TBiS bit to “0” (= stop counting)
• When an effective edge of measurement pulse is input
• Timer overflow. When an overflow occurs, MR3 bit in the TBiMR register is set
Measurement pulse input
Contents of the reload register (measurement result) can be read by reading TBi
register
Value written to TBi register is written to neither reload register nor counter
measurement pulse. The counter value is set to “0000h” to continue counting.
to “1” (overflowed) simultaneously. MR3 bit is set to “0” (no overflow) by
writing to TBiMR register at the next count timing or later after MR3 bit was set
to “1”. At this time, make sure TBiS bit is set to “1” (start counting).
(2)
(3)
to “1” (= start counting)
Specification
(1)
15. Timers

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