M30626FJPFP#D5C Renesas Electronics America, M30626FJPFP#D5C Datasheet - Page 187

• Manufacturer Part Number: M30626FJPFP#D5C
• Description: MCU 3/5V 512K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPFP#D5C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 16.5
Three-Phase Output Buffer Register i
Timer B2 Special Mode Register
b7 b6 b5 b4
NOTES :
0 0
b7 b6 b5 b4
NOTES :
1. Values of the IDB0 and IDB1 registers are transferred to the three-phase output shift register by a transfer trigger.
1.
2.
3.
After the transfer trigger occurs, the values w ritten in the IDB0 register determine each phase output signal first.
Then the value w ritten in the IDB1 register on the falling edge of Timers A1, A2 and A4 one-shot pulse determines
each phase output signal.
Write to this register after setting the PRC1 bit in the PRCR register to “1” (w rite enable).
If the INV11 bit is “0” (three-phase mode 0) or the INV06 bit is “1” (saw tooth w ave modulation mode), set this bit to “0” (Timer
B2 underflow ).
Related pins are U(P8_0/TA4OUT), U
W(P7_4/TA2OUT), W
pin w hen the IVPCR1 bit = 1, the target pins go to a high-impedance state regardless of w hich functions of those pins are
being used. After forced interrupt (cutoff), input “H” to the NMI
Jan 10, 2006
b3 b2 b1 b0
b3 b2 b1
TB2SC, IDB0 and IDB1 Registers
b0
Bit Symbol
IDB0, IDB1
Bit Symbol
PWCOM
IVPCR1
(b7-b2)
(b7-b6)
Symbol
___
DWBi
DVBi
DUBi
—
DWi
DUi
DVi
(P7_5/TA2IN). If a low -level signal is applied to the NMI
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Symbol
TB2SC
Timer B2 Reload Timing
Sw itching Bit
Three Phase Output Port NMI
Control Bit 1(3)
Nothing is assigned. When w rite, set to “0”.
When read, their contents are indeterminate.
U-Phase Output Buffer i
__
U
V-Phase Output Buffer i
__
V
W-Phase Output Buffer i
W
Reserved Bit
__
(1)
-Phase Output Buffer i
-Phase Output Buffer i
-Phase Output Buffer i
__
(P8_1/TA4IN), V(P7_2/CLK2/TA1OUT), V
034Ah, 034Bh
(1)
Address
Bit Name
Bit Name
(i=0, 1)
Address
039Eh
____
____
Write output level
0 : Active level
1 : Inactive level
When read, the value of the three-phase shift
register is read.
Set to “0”
0 : Timer B2 underflow
1 : Timer A output at odd-numbered
0 : Three-phase output forcible cutoff by NMI
1 : Three-phase output forcible cutoff by NMI
pin and set IVPCR1 bit to “0”: this forced cutoff w ill be reset.
occurrences
input (high-impedance) disabled
input (high-impedance) enabled
16. Three-Phase Motor Control Timer Function
____
__
(P7_3/CTS2/RTS2/TA1IN),
(2)
XXXXXX00b
Function
After Reset
Function
After Reset
00h
____
____
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
—