M30626FJPFP#D5C Renesas Electronics America, M30626FJPFP#D5C Datasheet - Page 240

• Manufacturer Part Number: M30626FJPFP#D5C
• Description: MCU 3/5V 512K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPFP#D5C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Table 17.19
NOTES:
U2TB
U2RB
U2BRG
U2MR
U2C0
U2C1
U2SMR
U2SMR2
U2SMR3
U2SMR4
1. Not all register bits are described above. Set those bits to “0” when writing to the registers in SIM mode.
Register
(1)
(1)
Jan 10, 2006
(1)
Registers to Be Used and Settings in SIM Mode
0 to 7
0 to 7
OER,FER,PER,SUM Error flag
0 to 7
SMD2 to SMD0
CKDIR
STPS
PRY
PRYE
IOPOL
CLK1, CLK0
CRS
TXEPT
CRD
NCH
CKPOL
UFORM
TE
TI
RE
RI
U2IRS
U2RRM
U2LCH
U2ERE
0 to 3
0 to 7
0 to 7
0 to 7
Bit
Page 223 of 390
Set transmission data
Reception data can be read
Set a bit rate
Set to “101b”
Select the internal clock or external clock
Set to “0”
Set this bit to “1” for direct format or “0” for inverse format
Set to “1”
Set to “0”
Select the count source for the U2BRG register
Invalid because CRD = 1
Transmit register empty flag
Set to “1”
Set to “0”
Set to “0”
Set this bit to “0” for direct format or “1” for inverse format
Set this bit to “1” to enable transmission
Transmit buffer empty flag
Set this bit to “1” to enable reception
Reception complete flag
Set to “1”
Set to “0”
Set this bit to “0” for direct format or “1” for inverse format
Set to “1”
Set to “0”
Set to “0”
Set to “0”
Set to “0”
Function
17. Serial Interface