M30626FJPFP#D5C Renesas Electronics America, M30626FJPFP#D5C Datasheet - Page 380

• Manufacturer Part Number: M30626FJPFP#D5C
• Description: MCU 3/5V 512K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPFP#D5C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
24.5
Program example when entering wait mode
Program example when entering stop mode
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Program Example:
Program Example:
When exiting stop mode by hardware reset, set RESET pin to “L” until a main clock oscillation is stabilized.
Set the MR0 bit in the TAiMR register (i=0 to 4) to “0” (pulse is not output) to use the timer A to exit stop
mode.
When entering wait mode, insert a JMP.B instruction before a WAIT instruction. Do not execute any
instructions which can generate a write to RAM between the JMP.B and WAIT instructions. Disable the DMA
transfers, if a DMA transfer may occur between the JMP.B and WAIT instructions. After the WAIT instruction,
insert at least 4 NOP instructions. When entering wait mode, the instruction queue roadstead the instructions
following WAIT, and depending on timing, some of these may execute before the microcomputer enters wait
mode.
Wait until the main clock oscillation stabilizes, before switching the clock source for CPU clock to the main
clock.
Similarly, wait until the sub clock oscillates stably before switching the clock source for CPU clock to the sub
clock.
Power Control
•
Jan 10, 2006
When entering stop mode, insert a JMP.B instruction immediately after executing an instruction which sets
the CM10 bit in the CM1 register to “1”, and then insert at least 4 NOP instructions. When entering stop
mode, the instruction queue reads ahead the instructions following the instruction which sets the CM10 bit
to “1” (all clock stops), and, some of these may execute before the microcomputer enters stop mode or
before the interrupt routine for returning from stop mode.
Page 363 of 390
L1:
L2:
JMP.B
FSET
WAIT
NOP
NOP
NOP
NOP
FSET
BSET
JMP.B
NOP
NOP
NOP
NOP
CM10
L2
L1
I
I
; Insert JMP.B instruction before WAIT instruction
;
; Enter wait mode
; More than 4 NOP instructions
; Enter stop mode
; Insert JMP.B instruction
; More than 4 NOP instructions
24. Precautions