M30626FJPFP#D5C Renesas Electronics America, M30626FJPFP#D5C Datasheet - Page 419

MCU 3/5V 512K 100-QFP

M30626FJPFP#D5C

Manufacturer Part Number
M30626FJPFP#D5C
Description
MCU 3/5V 512K 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet

Specifications of M30626FJPFP#D5C

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Rev.
REVISION HISTORY
Date
Page
177-
125
127
132
165
167
179
181
186
188
192
193
197
200
201
202
205
207
215
222
224
226
230
231
232
249
250
251
13.1 Cold Start / Warm Start moved to 5. Reset.
Table 14.1 DMAC Specifications is partly revised.
14.1.3 Effect of Software Wait is partly revised.
Table 16.1 Three-phase Motor Control Timer Functions Specifications is
partly revised.
Notes 5 and 7 of Figure 16.2 INVC0 Register are partly revised.
Figures 17.1 to 17.3 UART Block Diagram are partly revised.
Note 3 of Figure 17.5 UiRB Register is added.
Figure 17.10 UCON and UiSMR Registers
Notes 3 is revised.
Table 17.1 Clock Synchronous Serial I/O Mode Specifications is partly
revised.
Note 2 is partly revised.
Figure 17.13 Transmit and Receive Operation is revised.
17.1.1.1 Counter Measure for Communication Error Occurs is partly
revised.
Table 17.5 UART Mode Specifications is partly revised.
Note 1 is partly revised
Figure 17.19 Transmit Operation is revised.
17.1.2.1 Bit Rate is partly revised.
Table 17.9 Example of Bit Rates and Settings is partly revised.
17.1.2.2 Counter Measure for Communication Error Occurs is partly
revised.
Table 17.10 I
Note 4 of Table 17.11 Registers to Be Used and Settings in I
is added.
Table 17.15 Special Mode Specifications is partly revised.
Table 17.18 SIM Mode Specifications is partly revised.
Figure 17.34 Transmit and Receive Timing in SIM Mode is partly revised.
17.1.6.2 Format is partly revised.
Table 17.20 SI/O3 and SI/O4 Specifications is partly revised.
Figure 17.41 SI/Oi Operation Timing is partly revised.
Figure 17.42 Polarity of Transfer Clock is partly revised.
17.2.3 Functions for Settings an SOUTi Internal Value is partly revised.
18.2.6 Output Impedance of Sensor under A/D Conversion is partly
revised.
Figure 18.11 Analog Input Pin and External Sensor Equivalent Circuit is
partly revised.
Table 19.1 D/A Converter Performance is partly revised.
M16C/62P Group (M16C/62P, M16C/62PT) Hardware Manual
2
C Mode Specifications is partly revised.
C - 12
Description
Summary
2
C Mode (1)

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