M30626FJPGP#D5C Renesas Electronics America, M30626FJPGP#D5C Datasheet - Page 142

MCU 3/5V 512K 100-LQFP

M30626FJPGP#D5C

Manufacturer Part Number
M30626FJPGP#D5C
Description
MCU 3/5V 512K 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet

Specifications of M30626FJPGP#D5C

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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STCTX
[ Syntax ]
[ Operation ]
[ Function ]
[ Flag Change ]
[ Description Example ]
[ Related Instructions ]
Chapter 3
Change
STCTX
Flag
• This instruction saves task context to the stack area.
• Set the RAM address that contains the task number in abs16 and the start address of table data in abs20.
• The required register information is specified from table data by the task number and the data in the stack area is
• Information on transferred registers is configured as shown below. Logic 1 indicates a register to be
• The table data is comprised as shown below. The address indicated by abs20 is the base address of
STCTX
abs20
transferred to each register according to the specified register information. Then the SP correction value is subtracted
to the stack pointer (SP). For this SP correction value, set the number of bytes you want to the transferred.
transferred and logic 0 indicates a register that is not transferred.
the table. The data stored at an address apart from the base address as much as twice the content of
abs16 indicates register information, and the next address contains the stack pointer correction value.
U
I
D i r e c t i o n i n
which address
increases
Functions
Base address
of table
abs16,abs20
Ram,Rom_TBL
O B
S
LDCTX
*1
Z
Register information for the task whose task number = n
SP correction value for the task whose task number = n
Register information for the task whose task number = 0. (See the above diagram.)
Register information for the task whose task number = 1. (See the above diagram.)
Transferred sequentially beginning with FB
SP correction value for the task whose task number = 0. (See the above diagram.)
SP correction value for the task whose task number = 1. (See the above diagram.)
n=0 to 255
MSB
D
FB SB A1 A0 R3 R2 R1 R0
C
STore ConTeXt
Save context
124
[ Instruction Code/Number of Cycles ]
LSB
*1
*1
. (See the above diagram.)
. (See the above diagram.)
STCTX
3.2
Page= 235
Functions
abs16 x 2

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