SAK-C164CM-4EF AB Infineon Technologies, SAK-C164CM-4EF AB Datasheet - Page 55

IC MCU 16BIT 32KB OTP TQFP-64-4

SAK-C164CM-4EF AB

Manufacturer Part Number
SAK-C164CM-4EF AB
Description
IC MCU 16BIT 32KB OTP TQFP-64-4
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAK-C164CM-4EF AB

Core Processor
C166
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
64-LFQFP
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
1xASC, 1xSSC
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
50
Number Of Timers
5
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
P-TQFP-64
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
2.0 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
32.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
SAK-C164CM-4EFAB
SAK-C164CM-4EFABINTR
SAK-C164CM-4EFABTR
SAK-C164CM-4EFABTR
SAKC164CM4EFABXT
SP000056829
SP000104063
Direct Drive
When direct drive is configured (CLKCFG = 011
disabled and the CPU clock is directly driven from the internal oscillator with the input
clock signal.
The frequency of
f
f
The timings listed below that refer to TCLs therefore must be calculated using the
minimum TCL that is possible under the respective circumstances. This minimum value
can be calculated via the following formula:
For two consecutive TCLs the deviation caused by the duty cycle of
so the duration of 2TCL is always 1/
be used only once for timings that require an odd number of TCLs (1, 3, …). Timings that
require an even number of TCLs (2, 4, …) may use the formula 2TCL = 1/
Data Sheet
CPU
OSC
.
(i.e. the duration of an individual TCL) is defined by the duty cycle of the input clock
TCL
min
= 1/
f
OSC
f
CPU
× DC
directly follows the frequency of
min
(DC = duty cycle)
f
OSC
. The minimum value TCL
51
B
) the on-chip phase locked loop is
f
OSC
so the high and low time of
f
OSC
min
therefore has to
is compensated
f
V1.0, 2001-05
OSC
C164CM
C164SM
.

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