SAK-TC1766-192F80HL BD Infineon Technologies, SAK-TC1766-192F80HL BD Datasheet - Page 100

IC MCU 32BIT FLASH PG-LQFP-176

SAK-TC1766-192F80HL BD

Manufacturer Part Number
SAK-TC1766-192F80HL BD
Description
IC MCU 32BIT FLASH PG-LQFP-176
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet

Specifications of SAK-TC1766-192F80HL BD

Core Processor
TriCore
Core Size
32-Bit
Speed
80MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
81
Program Memory Size
1.5MB (1.5M x 8)
Program Memory Type
FLASH
Ram Size
108K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 2x10b; A/D 32x8b,10b,12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
176-LFQFP
Packages
PG-LQFP-176
Max Clock Frequency
80.0 MHz
Sram (incl. Cache)
108.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
1.5 MB
For Use With
B158-H8539-G2-X-7600IN - KIT STARTER TC176X SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
KT1766192F80HLBDXT
SAK-TC1766-192F80HLBDINTR
Preliminary
4.3.4
Table 4-12
TC1766.
Table 4-12
Parameter
Min.
pad states
Oscillator start-up time
Minimum PORST active time after
power supplies are stable at operating
levels
HDRST pulse width
PORST rise time
Setup time to PORST rising edge
Hold time from PORST rising edge
Setup time to HDRST rising edge
Hold time from HDRST rising edge
Ports inactive after PORST reset
active
Ports inactive after HDRST reset
active
Minimum
threshold.
Minimum
threshold.
Power-on Reset Boot Time
Hardware/Software Reset Boot Time
at
1) This parameter is valid under assumption that PORST signal is constantly at low-level during the power-
2) This parameter is verified by device characterization. The external oscillator circuitry must be optimized by the
3) Any HDRST activation is internally prolonged to 1024 FPI bus clock (
Data Sheet
f
up/power-down of the
customer and checked for negative resistance as recommended and specified by crystal suppliers.
CPU
V
6)7)
8)
DDP
=80MHz
V
V
9)
voltage to ensure defined
1)
9)
DDP
DD
Power, Pad and Reset Timing
provides the characteristics of the power, pad and reset timing in the
PORST activation
Power, Pad and Reset Timing Parameters
11)
PORST activation
V
DDP
2)
.
10)
4)
5)
4)
5)
Symbol
V
t
t
t
t
t
t
t
t
t
t
V
V
t
t
OSCS
POA
HD
POR
POS
POH
HDS
HDH
PIP
PI
BP
B
DDPPA
PORST3.3
PORST1.5
96
CC 0.6
CC –
SR 10
CC 1024 clock
SR –
SR 0
SR 100
SR 0
SR 100 +
CC –
CC –
SR –
SR –
CC 2.15
CC 500
Min.
cycles
(2 × 1/
f
SYS
) cycles.
Limit Values
3)
f
SYS
Electrical Parameters
)
Max.
10
50
150
150 +
5 × 1/
2.9
1.32
3.50
800
V1.0, 2008-04
f
SYS
TC1766
Unit
V
ms
ms
f
ms
ns
ns
ns
ns
ns
ns
V
V
ms
µs
SYS

Related parts for SAK-TC1766-192F80HL BD