SAK-TC1766-192F80HL BD Infineon Technologies, SAK-TC1766-192F80HL BD Datasheet - Page 21

IC MCU 32BIT FLASH PG-LQFP-176

SAK-TC1766-192F80HL BD

Manufacturer Part Number
SAK-TC1766-192F80HL BD
Description
IC MCU 32BIT FLASH PG-LQFP-176
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet

Specifications of SAK-TC1766-192F80HL BD

Core Processor
TriCore
Core Size
32-Bit
Speed
80MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
81
Program Memory Size
1.5MB (1.5M x 8)
Program Memory Type
FLASH
Ram Size
108K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 2x10b; A/D 32x8b,10b,12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
176-LFQFP
Packages
PG-LQFP-176
Max Clock Frequency
80.0 MHz
Sram (incl. Cache)
108.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
1.5 MB
For Use With
B158-H8539-G2-X-7600IN - KIT STARTER TC176X SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
KT1766192F80HLBDXT
SAK-TC1766-192F80HLBDINTR
Preliminary
Table 2-1
Symbol
P5.8
P5.9
P5.10
P5.11
P5.12
P5.13
Data Sheet
Pins I/O Pad
13
14
15
16
17
18
Pin Definitions and Functions (cont’d)
Driver
Class
Power
Supply
Functions
OCDSDBG8
TDATA1
RDATA0B
OCDSDBG9
TVALID1
RVALID0B
OCDSDBG10
TREADY1
RREADY0B
OCDSDBG11
TCLK1
RCLK0B
OCDSDBG12
RDATA1
TDATA0
OCDSDBG13
RVALID1
TVALID0B
17
General Device Information
OCDS L2 Debug Line 8
(Indirect PC Addr. PC0)
MLI1 transmit channel data
output
MLI0 receive channel data
input B
OCDS L2 Debug Line 9
(Indirect PC Addr. PC1)
MLI1 transmit channel valid
output
MLI0 receive channel valid
input B
OCDS L2 Debug Line 10
(Indirect PC Addr. PC2)
MLI1 transmit channel ready
input
MLI0 receive channel ready
output B
OCDS L2 Debug Line 11
(Indirect PC Addr. PC3)
MLI1 transmit channel clock
output
MLI0 receive channel clock
input B
OCDS L2 Debug Line 12
(Indirect PC Addr. PC04)
MLI1 receive channel data
input
MLI0 transmit channel data
output B
OCDS L2 Debug Line 13
(Indirect PC Addr. PC05)
MLI1 receive channel valid
input
MLI0 transmit channel valid
output B
V1.0, 2008-04
TC1766

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