SAK-TC1766-192F80HL BD Infineon Technologies, SAK-TC1766-192F80HL BD Datasheet - Page 86

IC MCU 32BIT FLASH PG-LQFP-176

SAK-TC1766-192F80HL BD

Manufacturer Part Number
SAK-TC1766-192F80HL BD
Description
IC MCU 32BIT FLASH PG-LQFP-176
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet

Specifications of SAK-TC1766-192F80HL BD

Core Processor
TriCore
Core Size
32-Bit
Speed
80MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
81
Program Memory Size
1.5MB (1.5M x 8)
Program Memory Type
FLASH
Ram Size
108K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 2x10b; A/D 32x8b,10b,12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
176-LFQFP
Packages
PG-LQFP-176
Max Clock Frequency
80.0 MHz
Sram (incl. Cache)
108.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
1.5 MB
For Use With
B158-H8539-G2-X-7600IN - KIT STARTER TC176X SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
KT1766192F80HLBDXT
SAK-TC1766-192F80HLBDINTR
Preliminary
15)
16) For the definition of the parameters see also
17) Applies to AIN0 and AIN1, when used as auxiliary reference inputs.
18) This represents an equivalent switched capacitance. This capacitance is not switched to the reference voltage
19) The sampling capacity of the conversion C-Network is pre-charged to
Figure 4-1
Data Sheet
f
I
with a duration of up to
needs a total charge of
All ADC conversions with a duration longer than
at once. Instead of this smaller capacitances are successively switched to the reference voltage.
Because of the parasitic elements the voltage measured at AINx is lower then
C LC
AREF_MAX
A/D Converter Module
is valid for the minimum specified conversion time. The current flowing during an ADC conversion
ADC0 Clock Circuit
F ractional
Arbiter
D ivider
(1:20)
Q
t
C
CONV
= 25µs can be calculated with the formula
= 150pC from
f
T IM ER
f
D IV
(1:1) to (1:256)
Program m able
C lock D ivider
C ontrol U nit
C ON .C T C
(T im er)
V
Figure
AREF
t
C
.
82
= 25µs consume an
4-2.
f
BC
1:4
R equest Generation Logic
External M ultiplexer Logic
External T rigger Logic
C ontrol/Status Logic
I
Interrupt Logic
AREF_MAX
f
V
AN A
I
AREF_MAX
AREF
/2 before the sampling moment.
Program m able
C H C ON n.ST C
V
Electrical Parameters
=
AREF
C ounter
Q
= 6µA.
CONV
/2.
/
t
C
. Every conversion
M C A04657_m od
V1.0, 2008-04
Sam ple
T im e
TC1766
t
S

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