AD8045ARDZ Analog Devices Inc, AD8045ARDZ Datasheet - Page 5

IC OPAMP VF ULDIST LN 70MA 8SOIC

AD8045ARDZ

Manufacturer Part Number
AD8045ARDZ
Description
IC OPAMP VF ULDIST LN 70MA 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8045ARDZ

Slew Rate
1350 V/µs
Amplifier Type
Voltage Feedback
Number Of Circuits
1
-3db Bandwidth
1GHz
Current - Input Bias
2µA
Voltage - Input Offset
200µV
Current - Supply
16mA
Current - Output / Channel
70mA
Voltage - Supply, Single/dual (±)
3.3 V ~ 12 V, ±1.65 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width) Exposed Pad, 8-eSOIC. 8-HSOIC
Op Amp Type
High Speed
No. Of Amplifiers
1
Bandwidth
1GHz
Supply Voltage Range
3.3V To 12V
Amplifier Case Style
SOIC
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Exposed Paddle Voltage
Storage Temperature
Operating Temperature Range
Lead Temperature Range
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
for device soldered in circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
SOIC
LFCSP
Maximum Power Dissipation
The maximum safe power dissipation for the AD8045 is limited
by the associated rise in junction temperature (T
approximately 150°C, which is the glass transition temperature,
the properties of the plastic change. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric perform-
ance of the AD8045. Exceeding a junction temperature of
175°C for an extended period of time can result in changes in
silicon devices, potentially causing degradation or loss of
functionality.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy elec-
trostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation
and loss of functionality.
JA
(Soldering 10 sec)
is specified for the worst-case conditions, i.e., θ
θ
80
93
JA
Rating
12.6 V
See Figure 4
−V
±V
−V
−65°C to +125°C
−40°C to +125°C
300°C
150°C
S
S
S
− 0.7 V to +V
θ
30
35
JC
J
) on the die. At
JA
is specified
S
Unit
°C/W
°C/W
+ 0.7 V
Rev. A | Page 5 of 24
The power dissipated in the package (P
escent power dissipation and the power dissipated in the die
due to the AD8045 drive at the output. The quiescent power is
the voltage between the supply pins (V
current (I
RMS output voltages should be considered. If R
− V
I
worst case, when V
In single-supply operation with R
is V
Airflow increases heat dissipation, effectively reducing θ
Also, more metal directly in contact with the package leads and
exposed paddle from metal traces, through holes, ground, and
power planes reduce θ
Figure 4 shows the maximum safe power dissipation in the
package versus the ambient temperature for the exposed paddle
SOIC (80°C/W) and LFCSP (93°C/W) package on a JEDEC
standard 4-layer board. θ
OUT
Figure 4. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
S
, as in single-supply operation, the total drive power is V
. If the rms signal levels are indeterminate, consider the
OUT
P
P
P
D
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
D
D
= V
= Quiescent Power + (Total Drive Power – Load Power)
–40
=
=
S
).
(
(
V
V
S
/2.
S
S
–20
×
×
I
I
S
S
) (
)
OUT
+
+
0
AMBIENT TEMPERATURE (°C)
V
JA
= V
V
S
2
R
.
S
/
JA
L
LFCSP
4
20
×
S
values are approximations.
/4 for R
)
2
V
R
OUT
L
40
L
L
referenced to −V
to midsupply.
V
60
OUT
R
S
D
) times the quiescent
) is the sum of the qui-
L
2
SOIC
80
L
100
is referenced to
S
, worst case
AD8045
120
JA
.
S
×

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