LMP7708MM/NOPB National Semiconductor, LMP7708MM/NOPB Datasheet - Page 15

IC AMP PREC RRIO DUAL 8-MSOP

LMP7708MM/NOPB

Manufacturer Part Number
LMP7708MM/NOPB
Description
IC AMP PREC RRIO DUAL 8-MSOP
Manufacturer
National Semiconductor
Series
LMP®, PowerWise®r
Datasheet

Specifications of LMP7708MM/NOPB

Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Slew Rate
5.9 V/µs
Gain Bandwidth Product
15MHz
Current - Input Bias
0.2pA
Voltage - Input Offset
37µV
Current - Supply
1.7mA
Current - Output / Channel
86mA
Voltage - Supply, Single/dual (±)
2.7 V ~ 12 V, ±1.35 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Number Of Channels
2
Voltage Gain Db
130 dB
Common Mode Rejection Ratio (min)
86 dB
Input Offset Voltage
0.22 mV at 5 V
Operating Supply Voltage
3 V, 5 V, 9 V
Supply Current
1.9 mA at 5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
 Details
Other names
LMP7708MMTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMP7708MM/NOPB
Manufacturer:
NS/国半
Quantity:
20 000
Application Information
LMP7707/LMP7708/LMP7709
The LMP7707/LMP7708/LMP7709 devices are single, dual
and quad low offset voltage, rail-to-rail input and output pre-
cision amplifiers each with a CMOS input stage and the wide
supply voltage range of 2.7V to 12V. The LMP7707/
LMP7708/LMP7709 have a very low input bias current of only
±200 fA at room temperature.
The wide supply voltage range of 2.7V to 12V over the ex-
tensive temperature range of −40°C to 125°C makes either
the LMP7707, LMP7708 or LMP7709 an excellent choice for
low voltage precision applications with extensive temperature
requirements.
The LMP7707/LMP7708/LMP7709 have only ±37 µV of typ-
ical input referred offset voltage and this offset is guaranteed
to be less than ±500 µV for the single and ±520 µV for the
dual and quad over temperature. This minimal offset voltage
allows more accurate signal detection and amplification in
precision applications.
The low input bias current of only ±200 fA along with the low
input referred voltage noise of 9 nV/
LMP7708/LMP7709 superior qualities for use in sensor ap-
plications. Lower levels of noise introduced by the amplifier
mean better signal fidelity and a higher signal-to-noise ratio.
The LMP7707/LMP7708/LMP7709 are stable for a gain of 6
or higher. With proper compensation though, the LMP7707,
LMP7708 or LMP7709 can be operational at a gain of ±1 and
still maintain much faster slew rates than comparable fully
compensated amplifiers. The increase in bandwidth and slew
rate is obtained without any additional power consumption.
National Semiconductor is heavily committed to precision
amplifiers and the market segment they serve. Technical sup-
port and extensive characterization data is available for sen-
sitive applications or applications with a constrained error
budget.
The LMP7707 is offered in the space saving 5-Pin SOT23 and
8-Pin SOIC package, the LMP7708 comes in the 8-pin MSOP
and 8-Pin SOIC package and the LMP7709 is offered in the
14-Pin TSSOP and 14-Pin SOIC package. These small pack-
ages are ideal solutions for area constrained PC boards and
portable electronics.
CAPACITIVE LOAD
The LMP7707/LMP7708/LMP7709 devices can each be con-
nected as a non-inverting voltage follower. This configuration
is the most sensitive to capacitive loading.
The combination of a capacitive load placed on the output of
an amplifier along with the amplifier’s output impedance cre-
ates a phase lag which in turn reduces the phase margin of
the amplifier. If the phase margin is significantly reduced, the
response will be either underdamped or it will oscillate.
In order to drive heavier capacitive loads, an isolation resistor,
R
using this isolation resistor, the capacitive load is isolated
from the amplifier’s output, and hence, the pole caused by
C
R
R
independent of the value of C
R
rent drive.
ISO
L
ISO
ISO
ISO
is no longer in the feedback loop. The larger the value of
, as shown in the circuit in Figure 1 should be used. By
, the more stable the output voltage will be. If values of
result in reduced output swing and reduced output cur-
are sufficiently large, the feedback loop will be stable,
L
. However, larger values of
give the LMP7707/
15
INPUT CAPACITANCE
CMOS input stages inherently have low input bias current and
higher input referred voltage noise. The LMP7707/LMP7708/
LMP7709 enhances this performance by having the low input
bias current of only ±200 fA, as well as a very low input re-
ferred voltage noise of 9 nV/
large input stage has been used. This large input stage in-
creases the input capacitance of the LMP7707/LMP7708/
LMP7709. The typical value of this input capacitance, C
the LMP7707/LMP7708/LMP7709 is 25 pF. The input capac-
itance will interact with other impedances such as gain and
feedback resistors, which are seen on the inputs of the am-
plifier, to form a pole. This pole will have little or no effect on
the output of the amplifier at low frequencies and DC condi-
tions, but will play a bigger role as the frequency increases.
At higher frequencies, the presence of this pole will decrease
phase margin and will also cause gain peaking. In order to
compensate for the input capacitance, care must be taken in
choosing the feedback resistors. In addition to being selective
in picking values for the feedback resistor, a capacitor can be
added to the feedback path to increase stability.
Using this compensation method will have an impact on the
high frequency gain of the op amp, due to the frequency de-
pendent feedback of this amplifier. Low gain settings can,
again, introduce instability issues.
DIODES BETWEEN THE INPUTS
The LMP7707/LMP7708/LMP7709 have a set of anti-parallel
diodes between the input pins, as shown in Figure 3. These
diodes are present to protect the input stage of the amplifier.
At the same time, they limit the amount of differential input
voltage that is allowed on the input pins. A differential signal
larger than one diode voltage drop might damage the diodes.
The differential signal between the inputs needs to be limited
to ±300 mV or the input current needs to be limited to ±10 mA.
Exceeding these limits will damage the part.
FIGURE 2. Compensating for Input Capacitance
FIGURE 1. Isolating Capacitive Load
. In order to achieve this a
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, for

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