LMP7709MT/NOPB National Semiconductor, LMP7709MT/NOPB Datasheet - Page 20

• Manufacturer Part Number: LMP7709MT/NOPB
• Description: IC AMP PREC RRIO QUAD 14-TSSOP
• Manufacturer: National Semiconductor
• Series: LMP®, PowerWise®r

Specifications of LMP7709MT/NOPB

• Amplifier Type: General Purpose
• Number Of Circuits: 4
• Output Type: Rail-to-Rail
• Slew Rate: 5.9 V/µs
• Gain Bandwidth Product: 15MHz
• Current - Input Bias: 0.2pA
• Voltage - Input Offset: 37µV
• Current - Supply: 3.2mA
• Current - Output / Channel: 86mA
• Voltage - Supply, Single/dual (±): 2.7 V ~ 12 V, ±1.35 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Other names: LMP7709MT

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The inverse feedback factor of the circuit in Figure 14 is:
The pole of the inverse feedback function is located at:
The zero of the inverse feedback function is located at:
The low frequency inverse feedback factor is given by:
The high frequency inverse feedback factor is given by:
From these formulas, we can tell that
1.
2.
3.
4.
5.
FIGURE 14. LMP7707 with Lead-Lag Compensation for
The 1/F's zero is located at a lower frequency compared
to 1/F's pole.
The intersection point of 1/F and the open loop gain G is
determined by the choice of resistor values for R
R
compensation.
This procedure results in the creation of a pole-zero pair,
the positions of which are interdependent.
This pole-zero pair is used to:
— Raise the 1/F value to a greater value in the region
— Achieve the preceding with no additional loop phase
The location of the 1/F zero is determined by the following
conditions:
— The value of 1/F at low frequency.
— The value of 1/F at the intersection point.
— The location of 1/F pole.
C
immediately to the left of its intercept with the A
function in order to meet the G
delay.
if the values of R
Inverting Configuration
1
and R
F
are set before
min
requirement.
20203765
P
and
(13)
(14)
(15)
(16)
(17)
20
Note that the constraint 1/F
in the vicinity of the intersection of G and 1/F; 1/F can be
shaped elsewhere as needed. Two rules must be satisfied in
order to maintain adequate phase margin.
Rule 1 The plot of 1/F should intersect with the plot of the
Rule 2 The 1/F pole (see Figure 15) should be positioned at
The resulting system has approximately 45° of phase margin,
based upon the fact that the open loop gain's dominant pole
and the second pole are more than one decade apart and that
the open loop gain has no other pole within one decade of its
intersection point with 1/F. If there is a third pole in the open
loop gain G at a frequency greater than f
than a decade above that frequency, then there will be an
effect on phase margin.
DESIGN EXAMPLE
The input lead-lag compensation method can be applied to
an application using the LMP7707, LMP7708 or LMP7709 in
an inverting configuration, as shown in Figure 14.
FIGURE 15. LMP7707 Open Loop Gain and 1/F Lead-Lag
Figure 15 shows that G
= 2.4 MHz.
A gain of 6 dB (or a magnitude of –1) is well below the
LMP7707’s G
the inverse feedback factor is found using Equation 4 which
applies to both inverting and non-inverting configurations.
Unity gain implementation for the inverting configuration
means R
open loop gain at a value larger than G
point, the open loop gain G has a phase margin of
45°.
The location f
tersection
LMP7709 using the circuit of Figure 14. The inter-
section of G and 1/F at the op amp's second pole
location is the 45° phase margin reference point.
the frequency that is at least one decade below the
intersection point f
takes full advantage of the 90° of phase lead brought
about by the 1/F pole. This additional phase lead ac-
companies the increase in magnitude of 1/F ob-
served at frequencies greater than the 1/F pole.
F
= R
MIN
1
, and 1/F = 2 (6 dB).
. Without external lead-lag compensation,
Feedback Network.
point
2
MIN
in Figure 15 illustrates the proper in-
= 16 dB and f
2
≥
for
of 1/F and G. This positioning
G
min
the
needs to be satisfied only
LMP7707/LMP7708/
2
2
and if it occurs less
(intersection point)
MIN
202037ab
. At that