IC OPAMP QUAD SGL SUPPLY 14SOIC

LM2902DR2G

Manufacturer Part NumberLM2902DR2G
DescriptionIC OPAMP QUAD SGL SUPPLY 14SOIC
ManufacturerON Semiconductor
LM2902DR2G datasheets
 


Specifications of LM2902DR2G

Amplifier TypeGeneral PurposeNumber Of Circuits4
Slew Rate0.6 V/µsGain Bandwidth Product1MHz
Current - Input Bias90nAVoltage - Input Offset2000µV
Current - Supply1.4mACurrent - Output / Channel40mA
Voltage - Supply, Single/dual (±)3 V ~ 32 V, ±1.5 V ~ 16 VOperating Temperature-40°C ~ 105°C
Mounting TypeSurface MountPackage / Case14-SOIC (3.9mm Width), 14-SOL
Bandwidth1 MHzChannel Separation-120
Common Mode Rejection Ratio70Current, Input Bias-500 nA
Current, Input Offset200 nACurrent, Output40 mA
Current, Supply3 mANumber Of AmplifiersQuad
Package TypeSOIC-14Temperature, Operating, Range-40 to +105 °C
Voltage, Gain15 V/mVVoltage, Input-0.3 to 32 VDC
Voltage, Offset10 mVVoltage, Output, High3.5 V
Voltage, Output, Low5 mVVoltage, Supply3 to 32 VDC
Lead Free Status / RoHS StatusLead free / RoHS CompliantOutput Type-
-3db Bandwidth-Other namesLM2902DR2GOSTR
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The LM324 series is made using four internally
compensated, two−stage operational amplifiers. The first
stage of each consists of differential input devices Q20 and
Q18 with input buffer transistors Q21 and Q17 and the
differential to single ended converter Q3 and Q4. The first
stage performs not only the first stage gain function but also
performs the level shifting and transconductance reduction
functions. By reducing the transconductance, a smaller
compensation capacitor (only 5.0 pF) can be employed, thus
saving chip area. The transconductance reduction is
accomplished by splitting the collectors of Q20 and Q18.
Another feature of this input stage is that the input common
mode range can include the negative supply or ground, in
single supply operation, without saturating either the input
devices or the differential to single−ended converter. The
second stage consists of a standard current source load
amplifier stage.
3.0 V to V
CC(max)
1
2
3
4
Single Supply
70
60
50
40
30
20
10
0
1.0
CIRCUIT DESCRIPTION
Figure 2. Large Signal Voltage Follower Response
Each amplifier is biased from an internal−voltage
regulator which has a low temperature coefficient thus
giving each amplifier good temperature characteristics as
well as excellent power supply rejection.
V
CC
V
/GND
EE
Figure 3.
Phase Margin
Gain Margin
10
100
1000
LOAD CAPACITANCE (pF)
Figure 4. Gain and Phase Margin
http://onsemi.com
6
V
= 15 Vdc
CC
R
= 2.0 kW
L
T
= 25°C
A
5.0 ms/DIV
V
CC
1
1.5 V to V
CC(max)
2
3
1.5 V to V
4
EE(max)
V
EE
Split Supplies
70
60
50
40
30
20
10
0
10000