IC OPAMP GP R-R 6.4MHZ 8MSOP

TLV2462IDGKR

Manufacturer Part NumberTLV2462IDGKR
DescriptionIC OPAMP GP R-R 6.4MHZ 8MSOP
ManufacturerTexas Instruments
TLV2462IDGKR datasheets
 


Specifications of TLV2462IDGKR

Amplifier TypeGeneral PurposeNumber Of Circuits2
Output TypeRail-to-RailSlew Rate1.6 V/µs
Gain Bandwidth Product6.4MHzCurrent - Input Bias1.3nA
Voltage - Input Offset500µVCurrent - Supply550µA
Current - Output / Channel80mAVoltage - Supply, Single/dual (±)2.7 V ~ 6 V, ±1.35 V ~ 3 V
Operating Temperature-40°C ~ 125°CMounting TypeSurface Mount
Package / Case8-MSOP, Micro8™, 8-uMAX, 8-uSOP,Number Of Channels2
Common Mode Rejection Ratio (min)71 dBInput Voltage Range (max)Positive Rail
Input Voltage Range (min)Negative RailInput Offset Voltage2 mV
Input Bias Current (max)14 nAOutput Current (typ)80 mA
Operating Supply Voltage6 VSupply Current1.3 mA
Maximum Power Dissipation481 mWMaximum Operating Temperature+ 125 C
Minimum Operating Temperature- 40 CDual Supply Voltage+/- 3 V
Maximum Dual Supply Voltage+/- 3 VMinimum Dual Supply Voltage+/- 1.35 V
Mounting StyleSMD/SMTShutdownNo
Supply Voltage (max)6 VSupply Voltage (min)2.7 V
Voltage Gain Db109 dBLead Free Status / RoHS StatusLead free / RoHS Compliant
-3db Bandwidth-Other names296-7561-2
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PARAMETER MEASUREMENT INFORMATION
_
+
driving a capacitive load
When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the
device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater
than 10 pF, it is recommended that a resistor be placed in series (R
shown in Figure 49. A minimum value of 20
R G
Input
offset voltage
The output offset voltage, (V
) is the sum of the input offset voltage (V
OO
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
R G
R S
+ V
V
OO
IO
Figure 50. Output Offset Voltage Model
R null
R L
C L
Figure 48
APPLICATION INFORMATION
NULL
should work well for most applications.
R F
_
R NULL
+
C LOAD
Figure 49. Driving a Capacitive Load
IO
R F
I IB−
+
V I
+
I IB+
R
R
F
F
1 )
" I
1 )
R
IB)
S
R
R
G
G
WWW.TI.COM
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
) with the output of the amplifier, as
Output
) and both input bias currents (I
) times
IB
V O
" I
R
IB–
F
25