IC OPAMP GP R-R 6.4MHZ 8MSOP

TLV2462IDGKR

Manufacturer Part NumberTLV2462IDGKR
DescriptionIC OPAMP GP R-R 6.4MHZ 8MSOP
ManufacturerTexas Instruments
TLV2462IDGKR datasheets
 


Specifications of TLV2462IDGKR

Amplifier TypeGeneral PurposeNumber Of Circuits2
Output TypeRail-to-RailSlew Rate1.6 V/µs
Gain Bandwidth Product6.4MHzCurrent - Input Bias1.3nA
Voltage - Input Offset500µVCurrent - Supply550µA
Current - Output / Channel80mAVoltage - Supply, Single/dual (±)2.7 V ~ 6 V, ±1.35 V ~ 3 V
Operating Temperature-40°C ~ 125°CMounting TypeSurface Mount
Package / Case8-MSOP, Micro8™, 8-uMAX, 8-uSOP,Number Of Channels2
Common Mode Rejection Ratio (min)71 dBInput Voltage Range (max)Positive Rail
Input Voltage Range (min)Negative RailInput Offset Voltage2 mV
Input Bias Current (max)14 nAOutput Current (typ)80 mA
Operating Supply Voltage6 VSupply Current1.3 mA
Maximum Power Dissipation481 mWMaximum Operating Temperature+ 125 C
Minimum Operating Temperature- 40 CDual Supply Voltage+/- 3 V
Maximum Dual Supply Voltage+/- 3 VMinimum Dual Supply Voltage+/- 1.35 V
Mounting StyleSMD/SMTShutdownNo
Supply Voltage (max)6 VSupply Voltage (min)2.7 V
Voltage Gain Db109 dBLead Free Status / RoHS StatusLead free / RoHS Compliant
-3db Bandwidth-Other names296-7561-2
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macromodel information
Macromodel information provided was derived using Microsim Parts
software used with Microsim PSpice . The Boyle macromodel (see Note 2) and subcircuit in Figure 54 are
generated using the TLV246x typical electrical and operating characteristics at T
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most
cases):
D
Maximum positive output voltage swing
D
Maximum negative output voltage swing
D
Slew rate
D
Quiescent power dissipation
D
Input bias current
D
Open-loop voltage amplification
NOTE 2: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Intergrated Circuit Operational Amplifiers”, IEEE
Journal of Solid-State Circuits, SC-9, 353 (1974).
3
V DD +
RSS
ISS
RP
2
IN −
J1
IN +
1
11
DP
RD1
4
GND
.SUBCKT TLV246X 1 2 3 4 5
C1
11
12
2.46034E−12
C2
6
7
10.0000E−12
CSS
10
99
443.21E−15
DC
5
53
DY
DE
54
5
DY
DLP
90
91
DX
DLN
92
90
DX
DP
4
3
DX
EGND
99
0
POLY (2) (3,0) (4,0) 0 .5 .5
FB
7
99
POLY (5) VB VC VE VLP
+ VLN 0 21.600E6 −1E3 1E3 22E6 −22E6
GA
6
0
11
12 345.26E−6
GCM
0
6
10
99 15.4226E−9
ISS
10
4
DC 18.850E−6
HLIM
90
0
VLIM 1K
J1
11
2
10 JX1
J2
12
1
10 JX2
R2
6
9
100.00E3
Figure 54. Boyle Macromodels and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
APPLICATION INFORMATION
D
Unity-gain frequency
D
Common-mode rejection ratio
D
Phase margin
D
DC output resistance
D
AC output resistance
D
Short-circuit output current limit
EGND
R2
+
9
VD
CSS
+
VB
53
10
DC
J2
DE
12
54
C1
90
+
RD2
VE
HLIM
RD1
3
RD2
3
R01
8
R02
7
RP
3
RSS
10
VB
9
VC
3
VE
54
VLIM
7
VLP
91
VLN
0
.MODEL DX D (IS=800.00E−18)
.MODEL DY D (IS=800.00E−18 Rs = 1m Cjo=10p)
.MODEL JX1 NJF (IS=1.0000E−12 BETA=6.3239E−3
+ VTO= −1)
.MODEL JX2 NJF (IS=1.0000E−12 BETA=6.3239E−3
+ VTO= −1)
.ENDS
WWW.TI.COM
Release 8, the model generation
= 25 C. Using this
A
99
+
FB
RO2
C2
6
7
+
VLIM
8
GA
GCM
RO1
OUT
5
DLN
92
91
+
+
DLP
VLP
VLN
+
11
2.8964E3
12
2.8964E3
5
5.6000
99
6.2000
4
8.9127
99
10.610E6
0
DC 0
53
DC .7836
4
DC .7436
8
DC 0
0
DC 117
92
DC 117
29