AD844JRZ-16 Analog Devices Inc, AD844JRZ-16 Datasheet - Page 13

• Manufacturer Part Number: AD844JRZ-16
• Description: IC OPAMP CF 60MHZ 80MA 16SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD844JRZ-16

• Slew Rate: 2000 V/µs
• Amplifier Type: Current Feedback
• Number Of Circuits: 1
• -3db Bandwidth: 60MHz
• Current - Input Bias: 200pA
• Voltage - Input Offset: 50µV
• Current - Supply: 6.5mA
• Current - Output / Channel: 80mA
• Voltage - Supply, Single/dual (±): ±4.5 V ~ 18 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Op Amp Type: High Speed
• No. Of Amplifiers: 1
• Bandwidth: 60MHz
• Supply Voltage Range: ± 4.5V To ± 18V
• Amplifier Case Style: SOIC
• No. Of Pins: 16
• Operating Temperature Range: 0°C To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 3. Gain vs. Bandwidth
Gain
−1
−1
−2
−2
−5
−5
−10
−10
−20
−100
RESPONSE AS AN I-V CONVERTER
The AD844 works well as the active element in an operational
current-to-voltage converter, used in conjunction with an exter-
nal scaling resistor, R1, in Figure 30. This analysis includes the
stray capacitance, C
high speed DAC. Using a conventional op amp, this capacitance
forms a nuisance pole with R1 that destabilizes the closed-loop
response of the system. Most op amps are internally compensated
for the fastest response at unity gain, so the pole due to R1 and
C
example, if R1 is 2.5 kΩ, a C
quency of about 4 MHz, well within the response range of even a
medium speed operational amplifier. In a current feedback amp,
this nuisance pole is no longer determined by R1 but by the
input resistance, R
the same 15 pF forms a pole at 212 MHz and causes little
trouble. It can be shown that the response of this system is:
where:
K is a factor very close to unity and represents the finite dc gain
of the amplifier.
Td is the dominant pole.
Tn is the nuisance pole.
Using typical values of R1 = 1 kΩ and R
other words, the gain error is only 0.03%. This is much less than
the scaling error of virtually all DACs and can be absorbed, if
necessary, by the trim needed in a precise system.
In the AD844, R
voltages, and consequently the effect of finite gain is negligible
unless high value feedback resistors are used. Because that
results in slower response times than are possible, the relatively
low value of R
S
reduces the already narrow phase margin of the system. For
Td = KR1C
Tn = R
V
K
OUT
=
R1
1 kΩ
500 Ω
2 kΩ
1 kΩ
5 kΩ
500 Ω
1 kΩ
500 Ω
1 kΩ
5 kΩ
R
=
t
IN
R
+
I
C
t
t
sig
in the AD844 is rarely a significant source of error.
1 R
S
t
(assuming R
t
(
is fairly stable with temperature and supply
1
IN
+
S
. Because this is about 50 Ω for the AD844,
, of the current source, which may be a
s
R2
50 Ω
1 kΩ
500 Ω
1 kΩ
500 Ω
1 kΩ
100 Ω
100 Ω
50 Ω
50 Ω
Td
K
) (
R1
1
+
S
IN
s
of 15 pF places this pole at a fre-
Tn
<< R1)
)
BW (MHz)
35
60
15
30
5.2
49
23
33
21
3.2
t
= 3 MΩ, K = 0.9997; in
GBW (MHz)
35
60
30
60
26
245
230
330
420
320
Rev. F | Page 13 of 20
CIRCUIT DESCRIPTION OF THE AD844
A simplified schematic is shown in Figure 31. The AD844 differs
from a conventional op amp in that the signal inputs have
radically different impedance. The noninverting input (Pin 3)
presents the usual high impedance. The voltage on this input is
transferred to the inverting input (Pin 2) with a low offset voltage,
ensured by the close matching of like polarity transistors operating
under essentially identical bias conditions. Laser trimming nulls
the residual offset voltage, down to a few tens of microvolts. The
inverting input is the common emitter node of a complementary
pair of grounded base stages and behaves as a current summing
node. In an ideal current feedback op amp, the input resistance
is zero. In the AD844, it is about 50 Ω.
A current applied to the inverting input is transferred to a
complementary pair of unity-gain current mirrors that deliver
the same current to an internal node (Pin 5) at which the full
output voltage is generated. The unity-gain complementary
voltage follower then buffers this voltage and provides the load
driving power. This buffer is designed to drive low impedance
loads, such as terminated cables, and can deliver ±50 mA into a
50 Ω load while maintaining low distortion, even when operating
at supply voltages of only ±6 V. Current limiting (not shown)
ensures safe operation under short-circuited conditions.
+IN
3
I
I
I
B
B
SIG
C
Figure 30. Current-to-Voltage Converter
S
Figure 31. Simplified Schematic
2
–IN
TZ
AD844
5
R1
R
L
C
V
L
OUT
AD844
7
6
4
+V
OUTPUT
–V
S
S