OP471GS Analog Devices Inc, OP471GS Datasheet - Page 12

• Manufacturer Part Number: OP471GS
• Description: IC OPAMP GP 6.5MHZ QUAD 16SOIC
• Manufacturer: Analog Devices Inc

Specifications of OP471GS

• Slew Rate: 8 V/µs
• Amplifier Type: General Purpose
• Rohs Status: RoHS non-compliant
• Number Of Circuits: 4
• Gain Bandwidth Product: 6.5MHz
• Current - Input Bias: 25nA
• Voltage - Input Offset: 1000µV
• Current - Supply: 9.2mA
• Voltage - Supply, Single/dual (±): ±4.5 V ~ 18 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Op Amp Type: High Speed
• No. Of Amplifiers: 4
• Bandwidth: 6.5MHz
• No. Of Pins: 14
• Operating Temperature Range: -40°C To +85°C
• Settling Time: 4.5ns
• Rail/rail I/o Type: No
• Number Of Elements: 4
• Unity Gain Bandwidth Product: 6.5MHz
• Common Mode Rejection Ratio: 95dB
• Input Offset Voltage: 1.8@±15VmV
• Input Bias Current: 60nA
• Single Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (typ): ±5/±9/±12/±15V
• Voltage Gain In Db: 113.98dB
• Power Supply Rejection Ratio: 105.04dB
• Power Supply Requirement: Dual
• Shut Down Feature: No
• Single Supply Voltage (min): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): ±4.5V
• Dual Supply Voltage (max): ±18V
• Technology: Bipolar
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: SOIC W
• Output Type: -
• Current - Output / Channel: -
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Not Compliant

OP471
Quad Programmable Gain Amplifier
The combination of the quad OP471 and the DAC8408, a quad
8-bit CMOS DAC, creates a space-saving quad programmable gain
amplifier. The digital code present at the DAC, which is easily
set by a microprocessor, determines the ratio between the fixed
DAC feedback resistor and the impedance the DAC ladder presents
to the op amp feedback loop. Gain of each amplifier is:
V
PINS 9 (LSB) – 16 (MSB)
V
OUT
IN
DAC DATA BUS
= –
V
V
V
V
IN
IN
IN
IN
A
B
C
D
256
n
Figure 17. Quad Programmable Gain Amplifier
R
R
R
R
FB
FB
FB
FB
DAC-8408ET
A
B
C
D
DGND
DAC A
DAC B
DAC C
DAC D
–12–
V
DD
where n equals the decimal equivalent of the 8-bit digital code
present at the DAC. If the digital code present at the DAC
consists of all zeros, the feedback loop will be open causing the
op amp output to saturate. The 20 MW resistors placed in parallel
with the DAC feedback loop eliminates this problem with a very
small reduction in gain accuracy.
I
I
OUT2A/2B
OUT2C/2D
I
I
I
V
I
V
OUT1A
OUT1B
V
OUT1C
OUT1D
V
REF
REF
REF
REF
B
D
C
A
R1
20M
R2
20M
R3
20M
R4
20M
1/4
OP470E
1/4
OP470E
1/4
OP470E
1/4
OP470E
+15V
–15V
V
V
V
V
OUT
OUT
OUT
OUT
A
B
C
D
REV. A