CA3054MZ Intersil, CA3054MZ Datasheet - Page 2

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CA3054MZ

Manufacturer Part Number
CA3054MZ
Description
IC OP AMP 2X DIFF 14-SOIC
Manufacturer
Intersil
Datasheet

Specifications of CA3054MZ

Amplifier Type
Differential
Number Of Circuits
2
Gain Bandwidth Product
550MHz
Current - Input Bias
10µA
Voltage - Input Offset
450µV
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Output Type
-
Current - Output / Channel
-
Voltage - Supply, Single/dual (±)
-
-3db Bandwidth
-
Slew Rate
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CA3054MZ
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
CA3054MZ96
Manufacturer:
INTERSIL
Quantity:
8 056
NOTES:
Absolute Maximum Ratings
Collector-to-Emitter Voltage, V
Collector-to-Base Voltage, V
Collector-to-Substrate Voltage, V
Emitter-to-Base Voltage, V
Collector Current, I
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
Electrical Specifications
Maximum Voltage Ratings
The following chart gives the range of voltages which can be applied to the terminals listed vertically with respect to the termi-
nals listed horizontally. For example, the voltage range of the vertical Terminal 2 with respect to Terminal 4 is +15V to -5V.
(NOTE 4)
3. Voltages are not normally applied between these terminals. Voltages appearing between these terminals will be safe
4. Terminal No. 10 of CA3054 is not used.
DC CHARACTERISTICS For Each Differential Amplifier
Input Offset Voltage (Figure 8)
Input Offset Current (Figure 9)
Input Bias Current (Figure 5)
Quiescent Operating Current Ratio
(Figure 5)
Temperature Coefficient Magnitude of
Input Offset Voltage (Figure 7)
1. The collector of each transistor of the CA3054 is isolated from the substrate by an integral diode. The substrate must be connected to a voltage
2. θ
TERM
NO.
if the specified limits between all other terminals are not exceeded.
13
14
11
12
which is more negative than any collector voltage in order to maintain isolation between transistors and provide for normal transistor action. The
substrate should be maintained at signal (AC) ground by means of a suitable grounding capacitor, to avoid undesired coupling between transistors.
1
2
3
4
6
7
8
9
5
JA
is measured with the component mounted on an evaluation PC board in free air.
13
0, -20
PARAMETER
14
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Note 3
Note 3 Note 3 Note 3 +20, 0 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3
EBO
1
CBO
CEO
. . . . . . . . . . . . . . . . . . . . . . . . . . 5V
CIO
. . . . . . . . . . . . . . . . . . . . . . . . 20V
2
T
+20, 0 Note 3 +20, 0 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3
+5, -5
A
. . . . . . . . . . . . . . . . . . . . . . 15V
2
(Note 1) . . . . . . . . . . . . . . 20V
= 25°C
T
A
= 25°C
Note 3 +15, -5 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3
Note 3 +15, -5 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3
3
+1, -5
I C(Q1)
----------------- -
I C(Q2)
4
SYMBOL
---------------- -
∆V IO
V
∆T
Note 3 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3
Note 3 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3
I
or
IO
I
IO
I
6
I C(Q5)
----------------- -
I C(Q6)
CA3054
0, -20
7
V
V
V
V
V
CB
CB
CB
CB
CB
Note 3
Note 3 Note 3 Note 3 Note 3
Thermal Information
Thermal Resistance (Typical, Note 2)
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . . 175°C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
Maximum Power Dissipation (Any One Transistor) . . . . . . . 300mW
= 3V, I
= 3V, I
= 3V, I
= 3V, I
= 3V, I
8
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(Lead Tips Only)
TEST CONDITIONS
E(Q3)
E(Q3)
E(Q3)
E(Q3)
E(Q3)
+20, 0 Note 3 Note 3
+5, -5
9
= I
= I
= I
= I
= I
E(Q4)
E(Q4)
E(Q4)
E(Q4)
E(Q4)
Note 3 +15, -5 Note 3
Note 3 +15, -5 Note 3
11
= 2mA
= 2mA
= 2mA
= 2mA
= 2mA
-1, -5
12
MIN
Note 3
Note 3
+20, 0
+20, 0
+20, 0
+20, 0
-
-
-
-
-
strate
Sub-
Ref.
5
0.98 to
TYP
0.45
1.02
0.3
1.1
10
(NOTE 4)
Current Ratings
TERM
NO.
13
14
11
12
1
2
3
4
6
7
8
9
Maximum
MAX
24
5
2
-
-
mA
0.1
0.1
θ
I
50
50
50
50
IN
5
5
5
5
5
5
JA
140
µV/°C
UNIT
(°C/W)
mV
µA
µA
I
OUT
mA
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
-
50
50

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