HA3-2425-5 Intersil, HA3-2425-5 Datasheet

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HA3-2425-5

Manufacturer Part Number
HA3-2425-5
Description
IC AMP SAMPLE&HOLD 3.2US 14-DIP
Manufacturer
Intersil
Type
Monolithicr
Datasheets

Specifications of HA3-2425-5

Amplifier Type
Sample and Hold
Number Of Circuits
1
Slew Rate
5 V/µs
Gain Bandwidth Product
2.5MHz
Current - Input Bias
40nA
Voltage - Input Offset
3000µV
Current - Supply
3.5mA
Current - Output / Channel
15mA
Voltage - Supply, Single/dual (±)
±12 V ~ 15 V
Operating Temperature
0°C ~ 75°C
Mounting Type
Through Hole
Package / Case
14-DIP (0.300", 7.62mm)
Bandwidth
2.5 MHz
Bandwidth, Gain
2.5 MHz (Typ.)
Common Mode Rejection Ratio
90
Current, Input Bias
40 nA
Current, Input Offset
10 nA
Current, Output
±15 mA
Current, Supply
3.5 mA
Impedance, Thermal
95 °C/W
Input Resistance
10 Megohms (Typ.)
Number Of Amplifiers
Single
Package Type
PDIP-14
Propagation Delay
30 ns
Resistance, Input
10 Megohms
Temperature, Operating, Maximum
+75 °C
Temperature, Operating, Minimum
0 °C
Temperature, Operating, Range
0 to +75 °C
Time, Acquisition
2.3 μs (Typ.)
Time, Rise
75 ns
Time, Setting, Hold Mode
860 ns (Typ.)
Voltage, Gain
50 kV/V
Voltage, Input Offset
3 mV
Voltage, Offset, Input
3 mV (Typ.)
Voltage, Output Swing
±10 V
Voltage, Supply
±15 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Output Type
-
-3db Bandwidth
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HA3-2425-5
Manufacturer:
INTERSIL
Quantity:
5 530
Part Number:
HA3-2425-5
Manufacturer:
Intersil
Quantity:
300
Part Number:
HA3-2425-5
Manufacturer:
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Quantity:
20 000
3.2
The HA-2420 and HA-2425 is a monolithic circuit consisting
of a high performance operational amplifier with its output in
series with an ultra-low leakage analog switch and JFET
input unity gain amplifier.
With an external hold capacitor connected to the switch
output, a versatile, high performance sample-and-hold or
track-and-hold circuit is formed. When the switch is closed,
the device behaves as an operational amplifier, and any of
the standard op amp feedback networks may be connected
around the device to control gain, frequency response, etc.
When the switch is opened the output will remain at its last
level.
Performance as a sample-and-hold compares very favorably
with other monolithic, hybrid, modular, and discrete circuits.
Accuracy to better than 0.01% is achievable over the
temperature range. Fast acquisition is coupled with superior
droop characteristics, even at high temperatures. High slew
rate, wide bandwidth, and low acquisition time produce
excellent dynamic characteristics. The ability to operate at
gains greater than 1 frequently eliminates the need for
external scaling amplifiers.
The device may also be used as a versatile operational
amplifier with a gated output for applications such as analog
switches, peak holding circuits, etc. For more information,
please see Application Note AN517..
Ordering Information
HA1-2420-2
HA3-2425-5
PART NUMBER
µ
s Sample and Hold Amplifiers
RANGE (
-55 to 125
TEMP.
0 to 75
®
o
C)
1
14 Ld CERDIP
14 Ld PDIP
Data Sheet
PACKAGE
F14.3
E14.3
DWG. #
PKG.
1-888-INTERSIL or 321-724-7143
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Maximum Acquisition Time
• Low Droop Rate (C
• Gain Bandwidth Product . . . . . . . . . . . . . . . 2.5MHz (Typ)
• Low Effective Aperture Delay Time . . . . . . . . . 30ns (Typ)
• TTL Compatible Control Input
• ±12V to ±15V Operation
Applications
• 12-Bit Data Acquisition
• Digital to Analog Deglitcher
• Auto Zero Systems
• Peak Detector
• Gated Operational Amplifier
Pinout
November 19, 2004
- 10V Step to 0.1% . . . . . . . . . . . . . . . . . . . . . 4µs (Max)
- 10V Step to 0.01% . . . . . . . . . . . . . . . . . . . . 6µs (Max)
OFFSET ADJ.
OFFSET ADJ.
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
OUTPUT
Copyright © Intersil Americas Inc. 2003, 2004. All Rights Reserved
+IN
NC
-IN
V-
1
2
3
4
5
6
7
HA-2420 (CERDIP)
H
HA-2425 (PDIP)
= 1000pF). . . . . . . . . . 5µV/ms (Typ)
HA-2420, HA-2425
TOP VIEW
14
13
12
10
11
9
8
S/H CONTROL
GND
NC
HOLD CAP.
NC
V+
NC
FN2856.6

Related parts for HA3-2425-5

HA3-2425-5 Summary of contents

Page 1

... Ordering Information TEMP. o PART NUMBER RANGE ( C) PACKAGE HA1-2420-2 -55 to 125 14 Ld CERDIP HA3-2425 PDIP 1 November 19, 2004 Features • Maximum Acquisition Time - 10V Step to 0. 4µs (Max) - 10V Step to 0.01 6µs (Max) • Low Droop Rate (C • Gain Bandwidth Product . . . . . . . . . . . . . . . 2.5MHz (Typ) • ...

Page 2

Absolute Maximum Ratings Voltage Between V+ and V- Terminals .40V Differential Input Voltage . . . . . . . . ...

Page 3

... To 0.01% 10V Step Hold Step Error ±1mV Hold Mode Settling Time Aperture Time (Note 3) Effective Aperture Delay Time Aperture Uncertainty Drift Current (Note HA1-2420 HA1-2425 HA3-2425, HA4P2425, HA9P2425 POWER SUPPLY CHARACTERISTICS Supply Current (+) Supply Current (-) Power Supply Rejection NOTES: = ± 2kΩ 50pF Derived from computer simulation only ...

Page 4

Test Circuits and Waveforms -IN INPUT S/H HOLD +IN CONTROL CAP C H S/H CONTROL INPUT FIGURE 1. HOLD STEP ERROR AND DRIFT CURRENT S/H CONTROL OUTPUT ∆t NOTE: Measure the slope of the output during hold, ∆V/∆t, and compute ...

Page 5

Schematic Diagram 106 105 ...

Page 6

... The hold capacitor should have extremely high insulation resistance and low dielectric absorption. Polystyrene (below o 85 C), Teflon, or Parlene types are recommended. For more applications, consult Intersil Application Note AN517, or the factory applications group. R 0.002R F F ...

Page 7

CONTROL GND HOLD CAPACITOR OUT V+ FIGURE 9. GUARD RING LAYOUT (BOTTOM VIEW) Glossary of Terms Acquisition Time The time required following a “sample” command, for the output to reach its final value within ±0.1% or ±0.01%. This is the ...

Page 8

Typical Performance Curves 1000 MIN. SAMPLE TIME DRIFT DURING HOLD o FOR 0.1% ACCURACY (mV/s) 10V SWINGS (µs) 100 UNITY GAIN PHASE MARGIN (DEGREES) 10 1.0 UNITY GAIN BANDWIDTH (MHz) 0.1 SLEW RATE (V/µs) 0.01 10pF 100pF ...

Page 9

Typical Performance Curves S/H (5V/DIV OUT (2V/DIV.) -10V TIME (1µs/DIV) FIGURE 16. ACQUISITION TIME (C S/H (5V/DIV OUT (0.5V/DIV.) -1V TIME (1µs/DIV) FIGURE 18. ACQUISITION TIME (C S/H (5V/DIV OUT (50mV/DIV.) -0.1V TIME (500ns/DIV) ...

Page 10

Die Characteristics DIE DIMENSIONS: 102 mils x 61 mils x 19 mils 2590µm x 1550µm x 483µm METALLIZATION: Type: Al ±2k Å Å Thickness: 16k SUBSTRATE POTENTIAL: V- BACKSIDE FINISH: Gold, Nickel, Silicon, etc. Metallization Mask Layout VOS ...

Page 11

Dual-In-Line Plastic Packages (PDIP INDEX N/2 AREA -B- -A- D BASE PLANE -C- SEATING PLANE 0.010 (0.25 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between ...

Page 12

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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