ISL88706IB844Z

Manufacturer Part NumberISL88706IB844Z
DescriptionIC SUPERVISOR 4.38V 8-SOIC
ManufacturerIntersil
TypeSimple Reset/Power-On Reset
ISL88706IB844Z datasheet
 


Specifications of ISL88706IB844Z

Number Of Voltages Monitored1OutputOpen Drain or Open Collector
ResetActive LowReset Timeout140 ms Minimum
Voltage - Threshold4.38VOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case8-SOIC (3.9mm Width)
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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ISL88705, ISL88706, ISL88707, ISL88708, ISL88716, ISL88813
Absolute Maximum Ratings
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on any Pin with Respect to GND . . . . . . . . . . . -1.0V to +7V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Recommended Operating Conditions
Temperature Range (Industrial) . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θ
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications
Over the recommended operating conditions unless otherwise specified. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
SYMBOL
PARAMETER
V
Supply Voltage Range
DD
I
DD
I
Input Leakage Current (PFI)
LI
I
Output Leakage Current
LO
VOLTAGE THRESHOLDS
V
Fixed V
Voltage Trip Point
TH1
DD
V
Hysteresis at V
Input
TH1HYST
TH1
Temperature = +25°C
RST AND RST
V
Reset Output Voltage Low
OL
V
RST Output Voltage High
OH
RST Output Voltage High
t
V
to Reset Asserted Delay
RPD
TH
t
POR Time-Out Delay
POR
C
Load Capacitance on Reset Pins
LOAD
5
Thermal Information
Thermal Resistance (Typical, Note 1)
PDIP Package* (4-layer test board) . . . . . . . . . . . . .
SOIC Package (4-layer test board) . . . . . . . . . . . . .
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CONDITIONS
MIN
2.0
V
= 5V, WDT Inactive
DD
V
= 3V, WDT Inactive
DD
4.556
4.301
3.034
2.867
2.583
V
= 4.64V
TH1
V
= 4.38V
TH1
V
= 3.09V
TH1
V
= 2.92V
TH1
V
= 2.63V
TH1
≥ 3.3V, Sinking 2.5mA
V
DD
V
< 3.3V, Sinking 1.5mA
DD
≥ 3.3V, Sourcing 2.5mA
V
V
- 0.6
DD
DD
V
< 3.3V, Sourcing 1.5mA
V
- 0.6
DD
DD
≥ 3.3V, Sourcing 0.8mA
V
V
- 0.6
DD
DD
V
< 3.3V, Sourcing 0.5mA
V
- 0.6
DD
DD
C
is open
140
POR
θ
(°C/W)
JA
83
110
TYP
MAX
UNITS
5.5
V
10
19
µA
8
10
µA
100
nA
100
nA
4.640
4.724
V
4.380
4.459
V
3.090
3.146
V
2.920
2.973
V
2.630
2.677
V
46
mV
44
mV
37
mV
29
mV
31
mV
0.05
0.40
V
0.05
0.40
V
V
- 0.4
V
DD
V
- 0.4
V
DD
V
- 0.4
V
DD
V
- 0.4
V
DD
45
µs
200
260
ms
5
pF
FN8092.5
January 12, 2009