X5329P-2.7A Intersil, X5329P-2.7A Datasheet

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X5329P-2.7A

Manufacturer Part Number
X5329P-2.7A
Description
IC SUPERVISOR CPU 32K EE 8-DIP
Manufacturer
Intersil
Type
Simple Reset/Power-On Resetr
Datasheet

Specifications of X5329P-2.7A

Number Of Voltages Monitored
1
Output
Open Drain or Open Collector
Reset
Active High
Reset Timeout
100 ms Minimum
Voltage - Threshold
2.93V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
CPU Supervisor with 32Kbit SPI EEPROM
FEATURES
• Low V
• Long battery life with low power consumption
• 32Kbits of EEPROM
• Built-in inadvertent write protection
• 2MHz SPI interface modes (0,0 & 1,1)
• Minimize EEPROM programming time
• 2.7V to 5.5V and 4.5V to 5.5V power supply
• Available packages
• Pb-free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
—Five standard reset threshold voltages
—Re-program low V
—Reset signal valid to V
—<1µA max standby current
—<400µA max active current during read
—Power-up/power-down protection circuitry
—Protect 0, 1/4, 1/2 or all of EEPROM array with
—In circuit programmable ROM mode
—32-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
operation
—14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
using special programming sequence
Block Lock
CC
detection and reset assertion
SCK
V
SO
CS
WP
CC
SI
protection
CC
®
1
reset threshold voltage
CC
= 1V
V
Data Sheet
Command
Decode &
TRIP
Register
Control
Logic
Data
+
-
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Protect Logic
Power-on and
Low Voltage
Generation
Register
Timebase
8Kbits
8Kbits
16Kbits
Status
Reset
Reset
DESCRIPTION
These devices combine three popular functions, Power-
on Reset Control, Supply Voltage Supervision, and Block
Lock Protect Serial EEPROM Memory in one package.
This combination lowers system cost, reduces board
space requirements, and increases reliability.
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The device’s low V
user’s system from low voltage conditions by holding
RESET/RESET active when V
mum V
until V
lizes. Five industry standard V
available, however, Intersil’s unique circuits allow the
threshold to be reprogrammed to meet custom
requirements or to fine-tune the threshold in applica-
tions requiring higher precision.
October 17, 2005
CC
CC
All other trademarks mentioned are the property of their respective owners.
|
returns to proper operating level and stabi-
trip point. RESET/RESET remains asserted
Intersil (and design) is a registered trademark of Intersil Americas Inc.
(Replaces X25328, X25329)
Copyright Intersil Americas Inc. 2005. All Rights Reserved
CC
detection circuitry protects the
RESET/RESET
X5328 = RESET
X5329 = RESET
X5328, X5329
CC
TRIP
falls below a mini-
thresholds are
FN8132.1

Related parts for X5329P-2.7A

X5329P-2.7A Summary of contents

Page 1

... CC falls below a mini- CC trip point. RESET/RESET remains asserted returns to proper operating level and stabi- thresholds are TRIP RESET/RESET X5328 = RESET X5329 = RESET | Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved ...

Page 2

... X5328V14Z* (Note) X5328V Z X5329V14Z* (Note) X5328V14I* X5329V14I* X5328V14IZ* (Note) X5328V Z I X5329V14IZ* (Note) X5328P-2.7A X5329P-2.7A X5328PZ-2.7A (Note) X5328P Z AN X5329PZ-2.7A (Note) X5329P Z AN X5328PI-2.7A X5329PI-2.7A X5328PIZ-2.7A (Note) X5328P Z AP X5329PIZ-2.7A (Note) X5329P Z AP X5328S8-2.7A X5328 AN X5329S8-2.7A X5328S8Z-2.7A (Note) X5328 Z AN X5329S8Z-2.7A (Note) X5329 Z AN X5328S8I-2 ...

Page 3

... MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3 X5328, X5329 PART NUMBER RESET PART V RANGE CC (ACTIVE HIGH) MARKING (V) 2.7-5.5 X5329V Z AP X5329P F 2.7-5.5 X5329P Z F X5329P G X5329P Z G X5329V Z F X5329V Z G TEMP V RANGE RANGE (°C) PACKAGE TRIP 2.85-3.0 - TSSOP - TSSOP (Pb-free) 2 ...

Page 4

PIN DESCRIPTION Pin Pin (SOIC/PDIP) TSSOP Name SCK RESET/ RESET 3-5,10-12 NC PIN CONFIGURATION 8 Ld ...

Page 5

PRINCIPLES OF OPERATION Power-On Reset Application of power to the X5328/X5329 activates a Power-on Reset Circuit. This circuit goes active at about 1V and pulls the RESET/RESET pin active. This signal prevents the system microprocessor from start- ing to operate ...

Page 6

Figure 3. V Programming Sequence Flow Chart TRIP New V Applied = CC Old V Applied + Error CC Error ≥ Emax Emax = Maximum Desired Error Figure 4. Sample V Reset Circuit TRIP 4.7K V TRIP Adj. Program 6 ...

Page 7

... SPI SERIAL MEMORY The memory portion of the device is a CMOS Serial EEPROM array with Intersil’s block lock protection. The array is internally organized The device features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple four-wire bus. The device utilizes Intersil’s proprietary Direct Write cell, providing a minimum endurance of 100,000 cycles and a minimum data retention of 100 years ...

Page 8

The Write Enable Latch (WEL) bit indicates the Status of the Write Enable Latch. When WEL = 1, the latch is set HIGH and when WEL = 0 the latch is reset LOW. The WEL bit is a volatile, read ...

Page 9

Read Sequence When reading from the EEPROM memory array first pulled low to select the device. The 8-bit READ instruction is transmitted to the device, followed by the 16-bit address. After the READ opcode and address are sent, ...

Page 10

Figure 6. Read Status Register Sequence CS 0 SCK SI High Impedance SO Figure 7. Write Enable Latch Sequence CS SCK SI SO Figure 8. Write Sequence SCK Instruction ...

Page 11

Figure 9. Status Register Write Sequence CS 0 SCK SI High Impedance SO SYMBOL TABLE WAVEFORM INPUTS OUTPUTS Must be Will be steady steady May change Will change from LOW from LOW to HIGH to HIGH May change Will change ...

Page 12

ABSOLUTE MAXIMUM RATINGS Temperature under bias .................... -65°C to +135°C Storage temperature ........................ -65°C to +150°C Voltage on any pin with respect to V ...................................... -1.0V to +7V SS D.C. output current ............................................... 5mA Lead temperature (soldering, 10s) .................... 300°C ...

Page 13

EQUIVALENT A.C. LOAD CIRCUIT 2.06kΩ Output RESET/RESET 3.03kΩ 100pF A.C. CHARACTERISTICS (Over recommended operating conditions, unless otherwise specified) Serial Input Timing Symbol f Clock Frequency SCK t Cycle Time CYC t CS Lead Time LEAD t ...

Page 14

Serial Input Timing CS t LEAD SCK MSB IN High Impedance SO Serial Output Timing Symbol f Clock Frequency SCK t Output Disable Time DIS t Output Valid from Clock Low V t Output Hold Time HO ...

Page 15

Power-Up and Power-Down Timing V CC RESET (X5328) RESET (X5329) RESET Output Timing Symbol V Reset Trip Point Voltage, X5328-4.5A, X5328-4.5A TRIP Reset Trip Point Voltage, X5328, X5329 Reset Trip Point Voltage, X5328-2.7A, X5329-2.7A Reset Trip Point Voltage, X5328-2.7, X5329-2.7 ...

Page 16

V Set Conditions TRIP TRIP SCK Reset Conditions TRIP SCK > Programmed V CC TRIP 16 X5328, X5329 t THD ...

Page 17

V Programming Specifications V TRIP Parameter t SCK V Program Voltage Setup time VPS TRIP t SCK V Program Voltage Hold time VPH TRIP t V Program Pulse Width P TRIP t V Level Setup time TSU TRIP t V ...

Page 18

TYPICAL PERFORMANCE V Supply Current vs. Temperature ( -40C 25C Temp°C V vs. Temperature (programmed at 25°C) TRIP 5.025 5.000 4.975 3.525 3.500 3.475 2.525 2.500 2.475 0 25 Temperature 18 X5328, X5329 t ) ...

Page 19

PACKAGING INFORMATION Half Shoulder Width On All End Pins Optional .073 (1.84) Typ. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 19 X5328, X5329 8-Lead Plastic Dual In-Line Package Type ...

Page 20

PACKAGING INFORMATION 8-Lead Plastic Small Outline Gull Wing Package Type S Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 20 X5328, X5329 Pin 1 0.014 ...

Page 21

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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