S-1323B17NB-N8CTFG Seiko Instruments, S-1323B17NB-N8CTFG Datasheet - Page 13

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S-1323B17NB-N8CTFG

Manufacturer Part Number
S-1323B17NB-N8CTFG
Description
IC REG LDO 150MA 1.7V SC-82AB
Manufacturer
Seiko Instruments
Datasheet

Specifications of S-1323B17NB-N8CTFG

Regulator Topology
Positive Fixed
Voltage - Output
1.7V
Voltage - Input
Up to 6.5V
Voltage - Dropout (typical)
0.5V @ 150mA
Number Of Regulators
1
Current - Output
150mA (Min)
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SC-70-4, SC-82-4, SOT-323-4, SOT-343
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Limit (min)
-
The S-1323 Series requires an output capacitor between the VOUT and VSS pins for phase compensation. A
ceramic capacitor with a capacitance of 1.0 μF or more can be used. Even if using an OS capacitor, tantalum
capacitor, or aluminum electrolytic capacitor, a capacitance of 1.0 μF or more and an ESR of 10 Ω or less are
required.
The value of the output overshoot or undershoot transient response varies depending on the value of the output
capacitor.
When selecting the output capacitor, perform sufficient evaluation, including evaluation of temperature
characteristics, on the actual device.
Rev.5.0
Selection of Output Capacitor (C
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially
reduce the current consumption. The VOUT pin becomes the V
resistance of several hundreds kΩ between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 13. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption
increases if a voltage of 0.3 V to V
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.
Logic Type
ON/OFF
_00
A
A
B
B
HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR
Figure 13
“H”: Power off
“H”: Power on
“L”: Power on
“L”: Power off
ON/OFF Pin
VSS
VIN
Internal Circuits
IN
– 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not
Operating
Operating
Stopped
Stopped
L
)
Seiko Instruments Inc.
Table 6
VOUT Pin Voltage
Set value
Set value
V
V
SS
SS
level
level
SS
level due to the internally divided
Current Consumption
I
I
I
I
SS1
SS2
SS2
SS1
S-1323 Series
13

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