HDMIULC6-4SC6 STMicroelectronics, HDMIULC6-4SC6 Datasheet - Page 7

• Manufacturer Part Number: HDMIULC6-4SC6
• Description: IC HDMI ESD PROTECTION SOT23-6
• Manufacturer: STMicroelectronics

Specifications of HDMIULC6-4SC6

• Voltage - Reverse Standoff (typ): 5V
• Voltage - Breakdown: 6V
• Polarization: 4 Channel Array - Bidirectional
• Mounting Type: Surface Mount
• Package / Case: SOT-23-6
• Applications: General Purpose
• Number Of Circuits: 4
• Voltage - Working: 5V
• Voltage - Clamping: 6V
• Technology: Diode Array
• Polarity: Unidirectional
• Channels: 4 Channels
• Clamping Voltage: 17 V
• Operating Voltage: 5 V
• Breakdown Voltage: 6 V
• Termination Style: SMD/SMT
• Capacitance: 0.5 pF
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Dimensions: 1.75(Max) mm W x 3.05(Max) mm L
• Esd Protection Voltage: ±15KV@Air Gap/±15KV@Contact Disc
• Mounting Style: Surface Mount
• Clamping Voltage (max): 17V
• Leakage Current (max): 0.5uA
• Capacitance Value: 1pF
• Operating Temperature Min Deg. C: -55C
• Operating Temperature Max Deg. C: 125C
• Product Length (mm): 3.05mm
• Product Depth (mm): 1.75mm
• Product Height (mm): 1.3mm
• Pin Count: 6
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-5239-2

HDMIULC6-4SC6
3.3
It’s the reason why some recommendations have to be followed (see
ensure good ESD
Figure 9.
How to ensure good ESD protection
While the HDMIULC6-4SC6 provides a high immunity to ESD surge, an efficient protection
depends on the layout of the board. In the same way, with the rail to rail topology, the track
from data lines to I/O pins, from V
as short as possible to avoid over voltages due to parasitic phenomena (see
Figure 10
Figure 10. ESD behavior: layout
on data line
on data line
ESD surge
ESD surge
V
V
V
CL
CL
TRANSIL
+
-
for layout considerations).
=
=
V
-
ESD behavior: parasitic phenomena due to unsuitable layout
optimization
TRANSIL
V
F
V
L
L
-
BR
I/O
I/O
Unsuitable layout
L
Optimized layout
I/O pin
I/O pin
I/O
+
protection).
Rd.Ip
V
dt
di
F
L
L
L
L
I/O
I/O
I/O
I/O
+
-
L
L
dt
dt
dt
dt
di
di
di
di
I/O
GND
L
L
dt
di
L
L
V
V
VBUS
VBUS
dt
di
GND
GND
F
F
+
L
GND
V
V
GND pin
GND pin
cc
cc
V
V
dt
di
L
L
L
L
pin
pin
CC
TRANSIL
TRANSIL
GND
GND
GND
GND
dt
dt
dt
dt
di
di
di
di
to V
surge
surge
V
V
BUS
CL
CL
Data line
Data line
V
V
<
>
BUS
BUS
0
0
pin, and from GND plane to GND pin must be
Figure 11. ESD behavior: measurement
ESD SURGE
-
-
-
-
L
L
L
L
L
L
L
L
L
L
L
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
dt
dt
dt
dt
dt
dt
dt
dt
dt
dt
dt
di
di
di
di
di
di
di
di
di
di
di
V
V
TRANSIL
TRANSIL
+
+
+
+
+
+
+
-
-
-
-
L
L
L
L
L
L
L
L
L
L
L
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
-V
-V
+V
+V
F
F
dt
dt
dt
dt
dt
dt
dt
dt
dt
dt
dt
di
di
di
di
di
di
di
di
di
di
di
conditions
F
F
TEST BOARD
tr=1ns
tr=1ns
tr=1ns
tr=1ns
tr=1ns
tr=1ns
IN
V
V
V
V
V
V
CL+
CL+
CL+
CL+
CL-
CL-
HDMIULC6 - 4SC6
HDMIULC6 - 4SC6
Technical information
Section 3.3: How to
OUT
POSITIVE
POSITIVE
POSITIVE
POSITIVE
SURGE
SURGE
SURGE
SURGE
NEGATIVE
NEGATIVE
SURGE
SURGE
Figure 9
Vbus
t
t
t
t
t
t
and
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