DSP56303VL100 Freescale Semiconductor, DSP56303VL100 Datasheet - Page 80

• Manufacturer Part Number: DSP56303VL100
• Description: IC DSP 24BIT 100MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56303VL100

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 196-MAPBGA
• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 24KB
• Program Memory Size: Not RequiredKB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Package: 196MA-BGA
• Maximum Speed: 100 MHz
• Device Million Instructions Per Second: 100 MIPS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Packaging
3-14
Notes:
M10
M11
M12
Pin
No.
M1
M2
M3
M4
M5
M6
M7
M8
M9
Signal names are based on configured functionality. Most connections supply a single signal. Some connections
provide a signal with dual functionality, such as the MODx/IRQx pins that select an operating mode after RESET is
deasserted but act as interrupt lines during operation. Some signals have configurable polarity; these names are
shown with and without overbars, such as HAS/HAS. Some connections have two or more configurable functions;
names assigned to these connections indicate the function for a specific configuration. For example, connection N2
is data line H7 in non-multiplexed bus mode, data/address line HAD7 in multiplexed bus mode, or GPIO line PB7
when the GPIO function is enabled for this pin. Unlike in the TQFP package, most of the GND pins are connected
internally in the center of the connection array and act as heat sink for the chip. Therefore, except for GND
GND
HA0, HAS/HAS, or PB8
P1
Table 3-3.
HA2, HA9, or PB10
HA1, HA8, or PB9
H0, HAD0, or PB0
that support the PLL, other GND signals do not support individual subsystems in the chip
Signal Name
CLKOUT
EXTAL
BCLK
V
V
WR
NC
RD
CCH
CCP
DSP56303 MAP-BGA Signal Identification by Pin Number
N10
N11
N12
N13
N14
Pin
No.
N3
N4
N5
N6
N7
N8
N9
DSP56303 Technical Data, Rev. 11
H4, HAD4, or PB4
H2, HAD2, or PB2
Signal Name
AA3/RAS3
AA0/RAS0
RESET
GND
BCLK
V
V
CAS
BR
CCQ
CCC
A0
P
Pin
No.
P10
P11
P12
P13
P14
P5
P6
P7
P8
P9
(Continued)
Freescale Semiconductor
Signal Name
AA2/RAS2
AA1/RAS1
GND
.
PCAP
XTAL
V
BG
NC
BB
TA
CCC
P1
P
and